LAN9311-NU SMSC, LAN9311-NU Datasheet - Page 83
LAN9311-NU
Manufacturer Part Number
LAN9311-NU
Description
IC ETHER SW 2PRT 16BIT 128-VTQFP
Manufacturer
SMSC
Type
Two Port Managed Ethernet Switchr
Specifications of LAN9311-NU
Controller Type
Ethernet Switch Controller
Interface
Serial EEPROM
Voltage - Supply
3.3V
Operating Temperature
0°C ~ 70°C
Mounting Type
Surface Mount
Package / Case
128-TQFP, 128-VQFP
Product
Ethernet Switches
Number Of Transceivers
1
Standard Supported
802.3, 802.3u
Data Rate
10 MB, 100 MB
Supply Voltage (max)
3.3 V
Supply Voltage (min)
0 V
Maximum Operating Temperature
+ 70 C
Ethernet Connection Type
10 Base-T, 100 Base-TX
Minimum Operating Temperature
0 C
Mounting Style
SMD/SMT
For Use With
638-1076 - EVALUATION BOARD LAN9311-NU
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Current - Supply
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
638-1075
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
LAN9311-NU
Manufacturer:
CINCERA
Quantity:
3 023
Company:
Part Number:
LAN9311-NU
Manufacturer:
Microchip Technology
Quantity:
10 000
Part Number:
LAN9311-NU
Manufacturer:
SMSC
Quantity:
20 000
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Two Port 10/100 Managed Ethernet Switch with 16-Bit Non-PCI CPU Interface
Datasheet
SMSC LAN9311/LAN9311i
7.2
To Host MAC
To Port x
Switch Fabric MAC
Functionally, each PHY can be divided into the following sections:
Note 7.1
A block diagram of the Port x PHYs main components can be seen in
Port 1 & 2 PHYs
MDIO
MII
100BASE-TX Transmit
10BASE-T Transmit
PHY Auto-negotiation
HP Auto-MDIX
MII MAC Interface
PHY Management Control
Registers
Interface
PHY Management
Negotiation
Because the Port 1 PHY and Port 2 PHY are functionally identical, this section will describe
them as the “Port x PHY”, or simply “PHY”. Wherever a lowercase “x” has been appended
to a port or signal name, it can be replaced with “1” or “2” to indicate the Port 1 or Port 2
PHY respectively. All references to “PHY” in this section can be used interchangeably for
both the Port 1 & 2 PHYs. This nomenclature excludes the Virtual PHY.
MAC
MII
Auto-
Control
Interrupt Controller
To System
Interrupts
Figure 7.1 Port x PHY Block Diagram
and
and
10BASE-T Receive
100BASE-TX Receive
Transmitter
Reciever
10/100
10/100
DATASHEET
83
To GPIO/LED
Controller
LEDs
HP Auto-MDIX
From
System Clocks Controller
PLL
Figure
TXPx/TXNx
RXPx/RXNx
7.1.
Revision 1.7 (06-29-10)
To External
Port x Ethernet Pins
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