LAN9311-NU SMSC, LAN9311-NU Datasheet - Page 142

• Manufacturer Part Number: LAN9311-NU
• Description: IC ETHER SW 2PRT 16BIT 128-VTQFP
• Manufacturer: SMSC
• Type: Two Port Managed Ethernet Switchr

Specifications of LAN9311-NU

• Controller Type: Ethernet Switch Controller
• Interface: Serial EEPROM
• Voltage - Supply: 3.3V
• Operating Temperature: 0°C ~ 70°C
• Mounting Type: Surface Mount
• Package / Case: 128-TQFP, 128-VQFP
• Product: Ethernet Switches
• Number Of Transceivers: 1
• Standard Supported: 802.3, 802.3u
• Data Rate: 10 MB, 100 MB
• Supply Voltage (max): 3.3 V
• Supply Voltage (min): 0 V
• Maximum Operating Temperature: + 70 C
• Ethernet Connection Type: 10 Base-T, 100 Base-TX
• Minimum Operating Temperature: 0 C
• Mounting Style: SMD/SMT
• For Use With: 638-1076 - EVALUATION BOARD LAN9311-NU
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Current - Supply: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: 638-1075

Revision 1.7 (06-29-10)
10.2.2.2
S 1 0 1 0
Control Byte
Chip / Block
EE_SDA
Select Bits
EE_SCL
Single Byte Addressing
A
1
0
Figure 10.2
I
The I
by the address byte or bytes. The control byte is preceded by a start condition. The control byte and
address byte(s) are each acknowledged by the EEPROM slave. If the EEPROM slave fails to send an
acknowledge, then the sequence is aborted and the EPC_TIMEOUT bit of the
Register (E2P_CMD)
The control byte consists of a 4-bit control code, 3-bits of chip/block select and one direction bit. The
control code is 1010b. For single byte addressing EEPROMs, the chip/block select bits are used for
address bits 10, 9, and 8. For double byte addressing EEPROMs, the chip/block select bits are set
low. The direction bit is set low to indicate the address is being written.
Figure 10.3
2
A
9
Start Condition
C EEPROM Device Addressing
A
8
2
0
R/~W
C EEPROM is addressed for a read or write operation by first sending a control byte followed
S
A
C
K
A
7
illustrates typical I
displays the various bus states of a typical I
A
6
Address Byte
A
5
change
data
can
A
4
A
3
is set.
A
2
Data Valid
or Ack
Figure 10.3 I
A
stable
1
data
A
0
A
C
K
2
C EEPROM addressing bit order for single and double byte addressing.
Figure 10.2 I
change
data
can
DATASHEET
S 1 0 1 0
2
C EEPROM Addressing
Condition
Control Byte
Re-Start
142
Chip / Block
Select Bits
Two Port 10/100 Managed Ethernet Switch with 16-Bit Non-PCI CPU Interface
Sr
2
C Cycle
0 0 0
change
data
0
can
R/~W
2
A
C
K
C cycle.
Double Byte Addressing
A
1
5
Data Valid
A
or Ack
1
4
Address High
stable
data
A
1
3
Byte
A
1
2
A
1
1
change
A
1
0
data
can
A
9
A
8
SMSC LAN9311/LAN9311i
A
C
K
A
7
EEPROM Command
Stop Condition
A
6
Address Low
A
5
P
Byte
A
4
A
3
Datasheet
A
2
A
1
A
0
C
A
K