LAN9311-NU SMSC, LAN9311-NU Datasheet - Page 126
LAN9311-NU
Manufacturer Part Number
LAN9311-NU
Description
IC ETHER SW 2PRT 16BIT 128-VTQFP
Manufacturer
SMSC
Type
Two Port Managed Ethernet Switchr
Specifications of LAN9311-NU
Controller Type
Ethernet Switch Controller
Interface
Serial EEPROM
Voltage - Supply
3.3V
Operating Temperature
0°C ~ 70°C
Mounting Type
Surface Mount
Package / Case
128-TQFP, 128-VQFP
Product
Ethernet Switches
Number Of Transceivers
1
Standard Supported
802.3, 802.3u
Data Rate
10 MB, 100 MB
Supply Voltage (max)
3.3 V
Supply Voltage (min)
0 V
Maximum Operating Temperature
+ 70 C
Ethernet Connection Type
10 Base-T, 100 Base-TX
Minimum Operating Temperature
0 C
Mounting Style
SMD/SMT
For Use With
638-1076 - EVALUATION BOARD LAN9311-NU
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Current - Supply
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
638-1075
Available stocks
Company
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Manufacturer
Quantity
Price
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Manufacturer:
CINCERA
Quantity:
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LAN9311-NU
Manufacturer:
Microchip Technology
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Revision 1.7 (06-29-10)
9.8.2.1
30:26
25:24
23:21
20:16
15:14
BITS
10:0
31
13
12
11
Both TX command ‘A’ and TX command ‘B’ are required for each buffer in a given packet. TX
command ‘B’ must be identical for every buffer in a given packet. If the TX command ‘B’ words do not
match, the Ethernet controller will assert the Transmitter Error (TXE) flag.
TX Command ‘A’
Interrupt on Completion (IOC). When set, the TX_IOC bit will be asserted in the
Register (INT_STS)
Reserved. These bits are reserved. Always write zeros to this field to guarantee future compatibility.
Buffer End Alignment. This field specifies the alignment that must be maintained on the last data
transfer of a buffer. The host will add extra DWORDs of data up to the alignment specified in the
table below. The LAN9311/LAN9311i will remove the extra DWORDs. This mechanism can be used
to maintain cache line alignment on host processors.
Reserved. These bits are reserved. Always write zeros to this field to guarantee future compatibility
Data Start Offset (bytes). This field specifies the offset of the first byte of TX data. The offset value
can be anywhere from 0 bytes to a 31 byte offset.
Reserved. These bits are reserved. Always write zeros to this field to guarantee future compatibility
First Segment (FS). When set, this bit indicates that the associated buffer is the first segment of the
packet.
Last Segment. When set, this bit indicates that the associated buffer is the last segment of the
packet
Reserved. These bits are reserved. Always write zeros to this field to guarantee future compatibility.
Buffer Size (bytes). This field indicates the number of bytes contained in the buffer following this
command. This value, along with the Buffer End Alignment field, is read and checked by the
LAN9311/LAN9311i and used to determine how many extra DWORDs were added to the end of the
Buffer. A running count is also maintained in the LAN9311/LAN9311i of the cumulative buffer sizes
for a given packet. This cumulative value is compared against the Packet Length field in the TX
command ‘B’ word and if they do not correlate, the TXE flag is set.
Note:
The buffer size specified does not include the buffer end alignment padding or data start
offset added to a buffer.
when the current buffer has been fully loaded into the TX FIFO.
[25]
0
0
1
1
Table 9.10 TX Command 'A' Format
[24]
DATASHEET
0
1
0
1
126
DESCRIPTION
Two Port 10/100 Managed Ethernet Switch with 16-Bit Non-PCI CPU Interface
16-byte alignment
32-byte alignment
4-byte alignment
End Alignment
Reserved
SMSC LAN9311/LAN9311i
Interrupt Status
Datasheet
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