CY7C68320C-100AXC Cypress Semiconductor Corp, CY7C68320C-100AXC Datasheet - Page 24

• Manufacturer Part Number: CY7C68320C-100AXC
• Description: IC USB 2.0 BRIDGE AT2LP 100LQFP
• Manufacturer: Cypress Semiconductor Corp
• Series: EZ-USB AT2LP™r
• Type: USB to ATA Bridger

Specifications of CY7C68320C-100AXC

• Package / Case: 100-LQFP
• Controller Type: USB 2.0 Controller
• Interface: I²C
• Voltage - Supply: 3 V ~ 3.6 V
• Current - Supply: 50mA
• Operating Temperature: 0°C ~ 70°C
• Mounting Type: Surface Mount
• Operating Supply Voltage: 3.3 V
• Supply Current: 50 mA
• Maximum Operating Temperature: + 70 C
• Minimum Operating Temperature: 0 C
• Mounting Style: SMD/SMT
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: CY4615B - KIT USB TO ATA REFERENCE DESIGN
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: 428-2267; CY7C68320C-100AXC

Table 11. Configuration Data Organization (continued)
Document 001-05809 Rev. *B
0x08
Address
Byte
BUTTON_MODE
SEARCH_ATA_BUS
BIG_PACKAGE
ATA_EN
Reserved
Reserved
Drive Power Valid Polarity
Drive Power Valid Enable
Configuration
Item Name
Bit 7
Button mode (100-pin package only). Sets ATAPUEN,
PWR500# and DRVPWRVLD to become button inputs
returned on bits 2, 1, and 0 of EP1IN. This bit must be set to
‘0’ if the 56-pin packages are used.
0 = Disable button mode.
1 = Enable button mode.
Bit 6
Search ATA bus after RESET to detect non-removable ATA
and ATAPI devices. Systems with only a removable device
(such as CF readers) must set this bit to ‘0’. Systems with at
least one non-removable device must set this bit to ‘1’.
0 = Do not search for ATA devices.
1 = Search for ATA devices.
Bit 5
Selects the 100- or 56-pin package pinout configuration.
Using the wrong pinout may result in unpredictable behavior.
0 = Use 56-pin package pinout.
1 = Use 100-pin package pinout.
Bit 4
Drive ATA bus when AT2LP is in suspend. For designs in
which the ATA bus is shared between the AT2LP and
another ATA master (such as an MP3 player), the AT2LP
can place the ATA interface pins in a Hi-Z state when it
enters suspend. For designs that do not share the ATA bus,
the ATA signals must be driven while the AT2LP is in
suspend to avoid floating signals.
0 = Drive ATA signals when AT2LP is in suspend.
1 = Set ATA signals to Hi-Z when AT2LP is in suspend.
Bit 3
Reserved. This bit must be set to ‘0’.
Bit 2
Reserved. This bit must be set to ‘0’
Bit 1
Configure the logical polarity of the DRVPWRVLD input pin.
0 = Active LOW (‘connector ground’ indication)
1 = Active HIGH (power indication from device)
Bit 0
Enable the DRVPWRVLD pin. When this pin is enabled, the
AT2LP enumerates a removable ATA device, such as
CompactFlash or MicroDrive, as the IDE master device.
Enabling this pin also affects other pins related to removable
device operation.
0 = Disable removable ATA device support.
1 = Enable removable ATA device support.
Item Description
Configuration
CY7C68300C, CY7C68301C
CY7C68320C, CY7C68321C
Required
Contents
Contents
Variable
Page 24 of 42
0x78
[+] Feedback