CY7C68320C-100AXAT Cypress Semiconductor Corp, CY7C68320C-100AXAT Datasheet
CY7C68320C-100AXAT
Specifications of CY7C68320C-100AXAT
Available stocks
Related parts for CY7C68320C-100AXAT
CY7C68320C-100AXAT Summary of contents
Page 1
... Single Button Backup, Power Off, and LED-based Notification 56-pin QFN and 100-pin TQFP Pb-free Packages ■ CY7C68321C is Ideal for Battery Powered Designs ■ CY7C68320C is Ideal for Self and Bus Powered Designs ■ Automotive AEC Grade Option (–40 ° °C) ■ Features (CY7C68300C/CY7C68301C only) Pin Compatible ■ ...
Page 2
... Logic Block Diagram 24 MHz XTAL VBUS USB D+ D- Applications The CY7C68300C/301C and CY7C68320C/321A implement a USB 2.0 bridge for all ATA/ATAPI-6 compliant mass storage devices, such as the following: Hard Drives ■ CD-ROM, CD-R/W ■ DVD-ROM, DVD-RAM, DVD±R/W ■ MP3 Players ■ ...
Page 3
... Absolute Maximum Ratings .......................................... 36 Operating Conditions ..................................................... 36 DC Characteristics ......................................................... 36 AC Electrical Characteristics ........................................ 37 ATA Timing Characteristics ....................................... 37 Document Number: 001-05809 Rev. *H CY7C68300C, CY7C68301C CY7C68320C, CY7C68321C USB Transceiver Characteristics .............................. 37 Ordering Information ...................................................... 37 Ordering Code Definitions ......................................... 37 Package Diagrams .......................................................... 38 General PCB Layout Recommendations for USB Mass Storage Designs ..................................... 40 Quad Flat Package No Leads (QFN) Package Design Notes ...
Page 4
... Specifically, the CY7C68300C/CY7C68301C includes a mode that makes it pin-for-pin compatible with the EZ-USB AT2 (CY7C68300A). The USB port of CY7C68300C/301C and CY7C68320C/321A (AT2LP) is connected to a host computer directly or with the downstream port of a USB hub. Software on the USB host system issues commands and sends data to the AT2LP and receives status and data from the AT2LP using standard USB protocol ...
Page 5
... Pin Diagrams The AT2LP is available in different package types to meet a variety of design needs. The CY7C68320C/321C is available in 56-pin QFN and 100-pin TQFP packages to provide the greatest flexibility for new designs. The CY7C68300C is available in 56-pin SSOP and QFN package types and CY7C68301C is available in QFN package to ensure backward compatibility with CY7C68300A designs. ...
Page 6
... AGND 6 VCC 7 DPLUS 8 DMINUS 9 GND 10 VCC 11 GND 12 (PU10K) PWR500# 13 GND 14 Note Italic labels denote pin functionality during CY7C68300A compatibility mode. Document Number: 001-05809 Rev. *H CY7C68300C, CY7C68301C CY7C68320C, CY7C68321C 42 RESET# 41 GND 40 ARESET# 39 DA2 (VBUS_PWR_VALID) 38 CS1# 37 CS0# 36 DRVPWRVLD (DA2) 35 DA1 34 DA0 33 INTRQ 32 VCC ...
Page 7
... Figure 4. 56-pin QFN Pinout (CY7C68320C/CY7C68321C) IORDY 1 DMARQ 2 AVCC 3 XTALOUT 4 XTALIN 5 AGND 6 VCC 7 DPLUS 8 DMINUS 9 GND 10 VCC 11 GND 12 GPIO1 13 GND 14 Document Number: 001-05809 Rev. *H CY7C68300C, CY7C68301C CY7C68320C, CY7C68321C 42 RESET# 41 GND 40 ARESET# 39 DA2 38 CS1# 37 CS0# 36 GPIO0 35 DA1 34 DA0 33 INTRQ 32 VCC 31 DMACK# 30 DIOR# 29 DIOW# ...
Page 8
... Figure 5. 100-pin TQFP Pinout (CY7C68320C/CY7C68321C only) VCC 1 GND 2 IORDY 3 DMARQ 4 GND 5 GND 6 GND 7 GND 8 AVCC 9 XTALOUT 10 XTALIN 11 AGND VCC 16 DPLUS 17 DMINUS 18 GND 19 VCC 20 GND 21 SYSIRQ 22 GND 23 GND 24 GND 25 PWR500# 26 GND SCL 29 SDA 30 Document Number: 001-05809 Rev. *H CY7C68300C, CY7C68301C CY7C68320C, CY7C68321C DD8 ...
Page 9
... If byte 8, bit 4 of the EEPROM is set to ‘0’, the ATA interface pins are only active when VBUS_ATA_EN is asserted. See 2. The General Purpose inputs can be enabled on ATAPUEN, PWR500#, and DRVPWRVLD via EEPROM byte 8, bit 7 on CY7C68320C/CY7C68321C ‘#’ sign after the pin name indicates that it is active LOW. ...
Page 10
... If byte 8, bit 4 of the EEPROM is set to ‘0’, the ATA interface pins are only active when VBUS_ATA_EN is asserted. See 5. A ‘#’ sign after the pin name indicates that it is active LOW. Document Number: 001-05809 Rev. *H CY7C68300C, CY7C68301C CY7C68320C, CY7C68321C Pin Default State Type ...
Page 11
... Notes 6. If byte 8, bit 4 of the EEPROM is set to ‘0’, the ATA interface pins are only active when VBUS_ATA_EN is asserted. See 7. The General Purpose inputs can be enabled on ATAPUEN, PWR500#, and DRVPWRVLD via EEPROM byte 8, bit 7 on CY7C68320C/CY7C68321C. Document Number: 001-05809 Rev. *H ...
Page 12
... Notes 8. If byte 8, bit 4 of the EEPROM is set to ‘0’, the ATA interface pins are only active when VBUS_ATA_EN is asserted. See 9. The General Purpose inputs can be enabled on ATAPUEN, PWR500#, and DRVPWRVLD via EEPROM byte 8, bit 7 on CY7C68320C/CY7C68321C. Document Number: 001-05809 Rev. *H ...
Page 13
... AT2LP. The SYSIRQ pin must be pulled LOW if HID functionality is used. Refer to HID Functions for Button Controls on page 15 details on HID functionality CY7C68300C, CY7C68301C CY7C68320C, CY7C68321C Figure alternate clock source is used, 24MHz Xtal XTALOUT depicts the latching algorithm for more EP1 Data Byte ...
Page 14
... ATA Bus) must be set to ‘0’ to disable ATA device detection at startup non-removable device is connected in addition to a removable media device, the non removable device must be configured as IDE slave (device address 1). Document Number: 001-05809 Rev. *H CY7C68300C, CY7C68301C CY7C68320C, CY7C68321C Figure 7. SYSIRQ Latching Algorithm No No Yes GPIO Pins The GPIO pins enable a general purpose input and output interface ...
Page 15
... ATA_EN for more HID Functions for Button Controls Cypress’s CY7C68320C/CY7C68321C has the capability of supporting Human Interface Device (HID) signaling to the host. for more If there is an HID descriptor in the configuration data, the GPIO pins that are set as inputs are polled by the AT2LP logic approximately every 17 ms (depending on other internal interrupt routines) ...
Page 16
... This field indicates to the CY7C68300C/CY7C68301C that the ATACB contains a vendor-specific command block. The value of this field must match the value in EEPROM address 0x04 for the command to be recognized as a vendor-specific ATACB command. This field must be set to 0x24 for ATACB commands. CY7C68300C, CY7C68301C CY7C68320C, CY7C68321C ...
Page 17
... Document Number: 001-05809 Rev. *H CY7C68300C, CY7C68301C CY7C68320C, CY7C68321C Field Description This field controls the execution of the ATACB according to the bitfield values: Bit 7 IdentifyPacketDevice – This bit indicates that the data phase of the command contains ATAPI (0xA1) or ATA (0xEC) IDENTIFY device data. ...
Page 18
... Reserved Document Number: 001-05809 Rev. *H CY7C68300C, CY7C68301C CY7C68320C, CY7C68321C Field Description This field controls which of the TaskFile register read or write accesses occur. TaskFile read data is always 8 bytes in length, and unselected register data are returned as 0x00. Register accesses occur in sequential order as outlined ...
Page 19
... EZ-USB AT2LP Memory Data (CY7C68300A) Pinout (AT2LP Pinout) Pinout No VBUS_ATA_ENABLE Pin HIGH? Yes No ARESET# Pin LOW? Yes DD7 Pin Set HIGH No ARESET# Pin HIGH? Yes Normal Mass Board Manufacturing Storage Mode Test Mode CY7C68300C, CY7C68301C CY7C68320C, CY7C68321C Fused Memory Page [+] Feedback ...
Page 20
... Reserved (0) 15–30 (0Fh1Eh) Document Number: 001-05809 Rev. *H CY7C68300C, CY7C68301C CY7C68320C, CY7C68321C command for EEPROM accesses (CfgCB) and one for board level testing (MfgCB), as described in the following sections. There is a convenient method available for starting the AT2LP in Board Manufacturing Test Mode to enable reprogramming of EEPROMs without a mass storage device attached ...
Page 21
... Mode operation. See Mfg_read data format. Any data length can be specified, but only bytes 0 through 3 contain usable information length of 4 bytes is recommended. 8 through 11 Table 10. Mfg_read and Mfg_load Data Format Byte Bits 5:4 Bits 3 2 Table 10 for 7:0 3 7:0 CY7C68300C, CY7C68301C CY7C68320C, CY7C68321C Bits ...
Page 22
... for EEPROM devices that are internally byte-addressed memories recommended that the address pins be set this way even on EEPROMs that may indicate that the address pins are internal no-connects. Figure 10. Snapshot of ‘AT2LP Blaster’ Utility CY7C68300C, CY7C68301C CY7C68320C, CY7C68321C for details on how Page [+] Feedback ...
Page 23
... Specification enables a device to send a short or zero-length IN packet before returning a STALL handshake for certain cases. Certain host controller drivers may require a short packet before STALL not force a short packet before STALL Force a short packet before STALL. CY7C68300C, CY7C68301C CY7C68320C, CY7C68321C Required Variable Contents Contents 0x53 0x4B ...
Page 24
... PIO mode supported by the device. The AT2LP supports PIO modes 0, 3, and 4 only. PIO mode 0 is always enabled and has no corresponding configuration bit. Bit 1 = Enable PIO mode 4. Bit 0 = Enable PIO mode 3. CY7C68300C, CY7C68301C CY7C68320C, CY7C68321C Required Variable Contents Contents 0xD4 0x07 ...
Page 25
... AT2LP enumerates a removable ATA device, such as CompactFlash or MicroDrive, as the IDE master device. Enabling this pin also affects other pins related to removable device operation Disable removable ATA device support Enable removable ATA device support. CY7C68300C, CY7C68301C CY7C68320C, CY7C68321C Required Variable Contents Contents 0x78 Page ...
Page 26
... ATA bus to discover the number of LUNs Search ATA bus and determine number of LUNs 01 = Assume only LUN0 present; no ATA bus search 10 = Assume LUN0 and LUN1 present; no ATA bus search 11 = Assume LUN0 and LUN1 present; no ATA bus search CY7C68300C, CY7C68301C CY7C68320C, CY7C68321C Required Variable Contents Contents 0x00 ...
Page 27
... Number of configurations supported 1 for mass storage: 2 for HID: 3 for CSM Length of device descriptor in bytes Type Descriptor type USB Specification release number in BCD USB Specification release number in BCD Device class Device subclass CY7C68300C, CY7C68301C CY7C68320C, CY7C68321C Required Variable Contents Contents 0x00 0x12 0x01 0x00 ...
Page 28
... Length of this descriptor in bytes Endpoint descriptor type This is an out endpoint, endpoint number 2. This is a bulk endpoint. CY7C68300C, CY7C68301C CY7C68320C, CY7C68321C Required Variable Contents Contents 0x00 0x40 0x01 ...
Page 29
... Interval for polling (max NAK rate) Length of HID descriptor Descriptor Type HID HID Class Specification release number (1.10) Country Code Number of class descriptors (1 report descriptor) Descriptor Type Length of HID report descriptor CY7C68300C, CY7C68301C CY7C68320C, CY7C68321C Required Variable Contents Contents 0x00 0x02 0x00 0x07 ...
Page 30
... Logical Minimum (–128) Logical Maximum (127) Report Size 8 bits Report Count 2 fields Output (Data, Variable, Absolute) End Collection Byte length of this descriptor Interface Descriptor type Number of interface CY7C68300C, CY7C68301C CY7C68320C, CY7C68321C Required Variable Contents Contents 0x06 0xA0 0xFF 0x09 0xA5 0xA1 ...
Page 31
... Content Security Methods offered by the device Index of string descriptor that describes the Content Security Method CSM descriptor version number LANGID string descriptor length in bytes Descriptor type Language supported. The CY7C68300B supports one LANGID value. CY7C68300C, CY7C68301C CY7C68320C, CY7C68321C Required Variable Contents Contents 0x00 0x02 0x0D 0x00 ...
Page 32
... Unicode character MSB Unicode character LSB Unicode character MSB Unicode character LSB Unicode character MSB Unicode character LSB Unicode character MSB Unicode character LSB CY7C68300C, CY7C68301C CY7C68320C, CY7C68321C Required Variable Contents Contents 0x2C 0x03 ’C’ 0x43 0x00 ’y’ 0x79 0x00 ’ ...
Page 33
... Unicode character MSB Unicode character LSB Unicode character MSB Unicode character LSB Unicode character MSB Unicode character LSB Unicode character MSB Unicode character LSB Unicode character MSB CY7C68300C, CY7C68301C CY7C68320C, CY7C68321C Required Variable Contents Contents 0x00 ’r’ 0x72 0x00 0x2C 0x03 ’ ...
Page 34
... ASCII Character ASCII Character ASCII Character ASCII Character ASCII Character ASCII Character ASCII Character ASCII Character Amount of unused ROM space varies depending on strings. CY7C68300C, CY7C68301C CY7C68320C, CY7C68321C Required Variable Contents Contents ’6’ 0x36 0x00 ’7’ 0x37 0x00 ’8’ 0x38 0x00 ’ ...
Page 35
... Data Source Starting Address Data Length 2 C memory device when none is connected result CY7C68300C, CY7C68301C CY7C68320C, CY7C68321C 2 C memory device Table 12. Attempts to write outside this 2 C memory device) remains unchanged. wLength Data Data Length ...
Page 36
... Unconfigured Current UNCONFIG T Reset Time After Valid Power RESET Pin Reset After Power Up Document Number: 001-05809 Rev. *H CY7C68300C, CY7C68301C CY7C68320C, CY7C68321C Operating Conditions T (Ambient Temperature Under Bias) A Commercial .................................................... 0 C to +70 C Automotive.................................................. –40 C to +85 C Supply Voltage..........................................+3. +3.60 V Ground Voltage................................................................. (Oscillator or Crystal Frequency) .... 24 MHz ± ...
Page 37
... Ordering Code Definitions CY 7C683XXC - XXXX X Note 10. The General Purpose inputs can be enabled on ATAPUEN, PWR500#, and DRVPWRVLD with EEPROM byte 8, bit 7 on CY7C68320C/CY7C68321C. Document Number: 001-05809 Rev. *H USB Transceiver Characteristics Complies with the USB 2.0 specification for full- and high speed modes of operation. ...
Page 38
... Package Diagrams Figure 11. 100-pin Thin Plastic Quad Flatpack (14 × 20 × 1.4 mm) A101 Document Number: 001-05809 Rev. *H CY7C68300C, CY7C68301C CY7C68320C, CY7C68321C 51-85050 *C Page [+] Feedback ...
Page 39
... Figure 13. 56-pin QFN 8 × LF56A SIDE VIEW 0.08[0.003] C 1.00[0.039] MAX. 0.05[0.002] MAX. 0.80[0.031] MAX. 0.20[0.008] REF. 6.1 0°-12° 0.30[0.012] C SEATING PLANE 0.50[0.020] CY7C68300C, CY7C68301C CY7C68320C, CY7C68321C 51-85062 *D BOTTOM VIEW 6.1 0.18[0.007] 0.28[0.011] PIN1 ID N 0.20[0.008 0.45[0.018] SOLDERABLE EXPOSED PAD 0.24[0.009] (4X) 0 ...
Page 40
... The QFN’s metal die paddle must be soldered to the PCB’s thermal pad. Solder mask is placed on the board top side over each via to resist solder flow into the via. The mask on the top side also minimizes outgassing during the solder reflow process. CY7C68300C, CY7C68301C CY7C68320C, CY7C68321C 001-53450 *B Page [+] Feedback ...
Page 41
... CY7C68300C/CY7C68301C and the ATA/ATAPI device are not recommended. Document Number: 001-05809 Rev. *H CY7C68300C, CY7C68301C CY7C68320C, CY7C68321C Figure 15 displays a cross-sectional area underneath the package. The cross section is of only one via. The solder paste template needs to be designed to enable at least 50% solder coverage. The thickness of the solder paste template must be 5 mil recommended that ’ ...
Page 42
... QFN quad flat no leads SSOP shrink small-outline package TQFP thin quad flat pack USB universal serial bus Document Number: 001-05809 Rev. *H CY7C68300C, CY7C68301C CY7C68320C, CY7C68321C Document Conventions Units of Measure Symbol Unit of Measure ns nano seconds V Volts mV milli Volts µW micro Watts µ ...
Page 43
... Document History Page Description Title: CY7C68300C/CY7C68301C/CY7C68320C/CY7C68321C EZ-USB AT2LP™ USB 2.0 to ATA/ATAPI Bridge Document Number: 001-05809 Submission Rev. ECN No. Date ** 409321 See ECN *A 611658 See ECN *B 2717536 06/11/2009 *C 2733311 07/08/09 *D 2755364 08/28/09 *E 2813871 11/25/09 *F 2896245 03/19/10 *G 2956403 06/19/10 *H 3124965 01/03/2011 Document Number: 001-05809 Rev. *H Orig ...
Page 44
... Use may be limited by and subject to the applicable Cypress software license agreement. Document Number: 001-05809 Rev. *H All products and company names mentioned in this document may be the trademarks of their respective holders. cypress.com/go/plc Revised January 3, 2011 CY7C68300C, CY7C68301C CY7C68320C, CY7C68321C PSoC Solutions psoc.cypress.com/solutions PSoC 1 | PSoC 3 ...