MC68360RC25K Freescale Semiconductor, MC68360RC25K Datasheet - Page 417
MC68360RC25K
Manufacturer Part Number
MC68360RC25K
Description
IC MPU QUICC 25MHZ 241-PGA
Manufacturer
Freescale Semiconductor
Datasheets
1.MC68EN360VR25L.pdf
(14 pages)
2.MC68EN360VR25L.pdf
(2 pages)
3.MC68360AI25L.pdf
(962 pages)
Specifications of MC68360RC25K
Processor Type
M683xx 32-Bit
Speed
25MHz
Voltage
5V
Mounting Type
Surface Mount
Package / Case
241-PGA
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Features
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The QUICC can identify and support each IDL channel or can output strobe lines for inter-
facing devices that do not support the IDL bus.
The IDL signals for each transmit and receive channel are as follows:
The basic rate IDL bus has three channels:
There are two definitions of the IDL bus frame structure: 8 bits and 10 bits (see Figure 7-33).
The difference between them is only the channel order within the frame.
The QUICC supports all channels of the IDL bus in the basic rate. Each bit in the IDL frame
can be routed to every SCC and SMC or can assert a strobe output for supporting an exter-
nal device.
1. L1RCLKx—IDL clock; input to the QUICC.
2. L1RSYNCx—IDL sync signal; input to the QUICC. This signal indicates that the clock
3. L1RXDx—IDL receive data; input to the QUICC. Valid only for the bits that are
4. L1TXDx—IDL transmit data; output from the QUICC. Valid only for the bits that are
5. L1RQx—IDL request permission to transmit on the D channel; output from the QUICC
6. L1GRx—IDL grant permission to transmit on the D Channel; input to the QUICC on
• B1—64 kbps bearer channel
• B2—64 kbps bearer channel
• D—16 kbps signaling channel
periods following the pulse designate the IDL frame.
supported by the IDL; ignored for other signals that may be present.
supported by the IDL; three-stated otherwise.
on L1RQx pin.
L1TSYNCx pin.
x = a and b for TDMa and TDMb.
Previous versions of Motorola’s IDL-defined bit functions, called
auxiliary (A) and maintenance (M), were eliminated from the IDL
definition when it was decided that the IDL control channel would
be out-of-band. They were defined as a subset of the Motorola
SPI format called serial control port (SCP). If a user wishes to
implement the A and M bit functions as originally defined, the
TSA may be programmed to access these bits and to route them
transparently to an SCC or SMC. To perform the out-of-band
signaling required, the QUICC’s SPI may be used.
Freescale Semiconductor, Inc.
For More Information On This Product,
MC68360 USER’S MANUAL
Go to: www.freescale.com
NOTE
NOTE
Serial Interface with Time Slot Assigner
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