MC68360RC25K Freescale Semiconductor, MC68360RC25K Datasheet - Page 133
MC68360RC25K
Manufacturer Part Number
MC68360RC25K
Description
IC MPU QUICC 25MHZ 241-PGA
Manufacturer
Freescale Semiconductor
Datasheets
1.MC68EN360VR25L.pdf
(14 pages)
2.MC68EN360VR25L.pdf
(2 pages)
3.MC68360AI25L.pdf
(962 pages)
Specifications of MC68360RC25K
Processor Type
M683xx 32-Bit
Speed
25MHz
Voltage
5V
Mounting Type
Surface Mount
Package / Case
241-PGA
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Features
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The state machine for the MC68040 companion mode arbitration is shown in Figure 4-39.
3. If the 68040 requests the bus at the same time that a QUICC internal master is re-
4. When the QUICC no longer needs the bus, it deasserts BB and asserts BG.
questing the bus, the BR040ID bits are used to determine who will acquire the bus first.
NOTES:
1. If the 68040 and the QUICC Internal Master requests the bus at the same time, the highest priority requester wins.
2. The transition from "040 Owns Bus" to "QUICC Waiting for Bus" may be delayed, until the write portion of an 040
3. BB is only asserted by QUICC during the state "QUICC Owns Bus", otherwise BB is three-stated by the QUICC.
Figure 4-39. MC68040 Companion Mode Bus Arbitration State Machine
locked cycle if an 040 locked cycle is in progress when the higher priority QUICC internal master requests the bus.
BR IS ASSERTED BY 040 AND 040 HAS
PRIORITY OVER CURRENT QUICC
QUICC NO LONGER NEEDS BUS
REFRESH DOES NOT NEED BUS
EXTERNAL
HALT ASSERTED AND DRAM
BUS IDLE
INTERNAL BUS MASTER
OR
ASSERTED
Freescale Semiconductor, Inc.
IDLE
BG
For More Information On This Product,
040 REQUESTS BUS
MC68360 USER’S MANUAL
INTERNAL MASTER (IDMA, SDMA, OR DRAM
Go to: www.freescale.com
HALT IS ASSERTED AND DRAM REFRESH
DOES NOT REQUIRE EXTERNAL BUS
040 FINISHES
USE OF BUS
REFRESH) REQUESTS BUS
BB ASSERTED
BG NEGATED
OWNS BUS
ASSERTED
040 OWNS
QUICC
BUS
BG
040 STILL NEEDS BUS
QUICC STILL NEEDS BUS
QUICC INTERNAL MASTER OF HIGHER
PRIORITY THAN THE 68040 REQUIRES
BB = 1
EXTERNAL BUS
WAITING FOR
NEGATED
QUICC
BUS
BG
BB = 0
Bus Operation
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