MC68360RC25K Freescale Semiconductor, MC68360RC25K Datasheet - Page 124
MC68360RC25K
Manufacturer Part Number
MC68360RC25K
Description
IC MPU QUICC 25MHZ 241-PGA
Manufacturer
Freescale Semiconductor
Datasheets
1.MC68EN360VR25L.pdf
(14 pages)
2.MC68EN360VR25L.pdf
(2 pages)
3.MC68360AI25L.pdf
(962 pages)
Specifications of MC68360RC25K
Processor Type
M683xx 32-Bit
Speed
25MHz
Voltage
5V
Mounting Type
Surface Mount
Package / Case
241-PGA
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Features
-
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MC68360RC25K
Manufacturer:
FREESCALE
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Bus Operation
4.5.4 Double Bus Fault
A double bus fault results when a bus error or an address error occurs during the exception
processing sequence for any of the following:
For example, the QUICC attempts to stack several words containing information about the
state of the machine while processing a bus error exception. If a bus error exception occurs
during the stacking operation, the second error is considered a double bus fault. When a
double bus fault occurs, the QUICC halts and drives the HALT line low. Only a reset opera-
tion can restart a halted QUICC. However, bus arbitration can still occur (refer to 4.6 Bus
Arbitration). A second bus error or address error that occurs after exception processing has
4-48
1. A previous bus error
2. A previous address error
3. A reset
FC3–FC0
DSACKx
D31–D0
A31–A0
BGACK
CLKO1
HALT
R/W
DS
BR
BG
AS
S0
Freescale Semiconductor, Inc.
For More Information On This Product,
S2
READ
Figure 4-33. HALT Timing
MC68360 USER’S MANUAL
S4
Go to: www.freescale.com
WHILE THE PROCESSOR IS
(ARBITRATION PERMITTED
HALTED)
HALT
S0
S2
READ
S4
S0
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