MC68030RC40C Freescale Semiconductor, MC68030RC40C Datasheet - Page 454

• Manufacturer Part Number: MC68030RC40C
• Description: IC MPU 32BIT ENHANCED 128-PGA
• Manufacturer: Freescale Semiconductor

Specifications of MC68030RC40C

• Processor Type: M680x0 32-Bit
• Speed: 40MHz
• Voltage: 5V
• Mounting Type: Surface Mount
• Package / Case: 128-PGA
• Family Name: M68000
• Device Core: ColdFire
• Device Core Size: 32b
• Frequency (max): 40MHz
• Instruction Set Architecture: RISC
• Supply Voltage 1 (typ): 5V
• Operating Supply Voltage (max): 5.25V
• Operating Supply Voltage (min): 4.75V
• Operating Temp Range: 0C to 70C
• Operating Temperature Classification: Commercial
• Mounting: Through Hole
• Pin Count: 128
• Package Type: PGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Features: -
• Lead Free Status / Rohs Status: Compliant

M O T O R O L A
tion to read the response CIR and thus determine the primitive that caused
When the MC68030 detects a protocol violation, it does not automatically
CIR. The exception handling routine may, however, use the MOVES instruc-
the MC68030 to initiate protocol violation exception processing. The main
tensions. Thus, the protocol violation is transparent to the coprocessor if the
notify the coprocessor of the resulting exception by writing to the control
processor initiates exception processing using the mid-instruction stack frame
(refer to Figure 10-43) and the coprocessor protocol violation exception vector
number 13. If the exception handler does not modify the stack frame, the
main processor reads the response CIR again following the execution of an
RTE instruction to return from the exception handler. This protocol allows
extensions to the M68000 coprocessor interface to be emulated in software
by a main processor that does not provide hardware support for these ex-
primitive execution can be emulated in software by the main processor.
Abbreviations:
*Use of this primitive with CA = 0 will cause protocol violation on conditional instructions.
Transfer Status and/or ScanPC
Take Pre-lnstruction, Mid-Instruction, or Post-Instruction Exception
Other:
Protocol: If Used with Conditional Instruction
Exception Depends on Vector Supplies in Primitive
Table 10-6. Exceptions Related to Primitive Processing (Sheet 2 of 2)
EA= Effective Address
CP = Coprocessor
1, Trace - - Trace Made Pending if MC68020 in "Trace on Change
2. Address Error - - If Odd value Written to ScanPC
of Flow" Mode and DR = 1
M C 6 8 0 3 0 USER'S M A N U A L
Primitive
Protocol F-Line
X
X
X
Other
X
10-67
X
,,
I