MC68030RC40C Freescale Semiconductor, MC68030RC40C Datasheet - Page 309

• Manufacturer Part Number: MC68030RC40C
• Description: IC MPU 32BIT ENHANCED 128-PGA
• Manufacturer: Freescale Semiconductor

Specifications of MC68030RC40C

• Processor Type: M680x0 32-Bit
• Speed: 40MHz
• Voltage: 5V
• Mounting Type: Surface Mount
• Package / Case: 128-PGA
• Family Name: M68000
• Device Core: ColdFire
• Device Core Size: 32b
• Frequency (max): 40MHz
• Instruction Set Architecture: RISC
• Supply Voltage 1 (typ): 5V
• Operating Supply Voltage (max): 5.25V
• Operating Supply Voltage (min): 4.75V
• Operating Temp Range: 0C to 70C
• Operating Temperature Classification: Commercial
• Mounting: Through Hole
• Pin Count: 128
• Package Type: PGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Features: -
• Lead Free Status / Rohs Status: Compliant

9
9.1.1 T r a n s l a t i o n
9-8
The translation control register (TC) defines the size of pages in memory,
selects the root pointer register to be used for supervisor accesses, indicates
whether the top level of the translation tree is indexed by function code, and
the size of the logical address space; it contains the number of most signif-
the other hand, if the IS field is set to 15, the logical address space contains
specifies the number of logical address bits used to index into the various
ample, if the IS field is set to zero, the logical address space is 232 bytes. On
only 2 32-215 bytes.
levels of the translation tree. The initial shift (IS) field of the TC register defines
icant address bits that are ignored in the translation table lookup. For ex-
I
EXAMPLEAODRESS$OOAO1AO0 I0 0 0 0 0 0 0 0 1 0 1
ROOT POINTER
Figure 9-5. Example Translation Tree Layout in Memory
C o n t r o l
J
MC68030 USER'S MANUAL
$A
A
SIO000 I
$14000
$37000
SLOO281
$17FFC [
$37018
0 1 0 0 0 0 0 0 0 1 1 0 1
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I
I
I
I
~;oO~
$6
B
I
I
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. . . . . . . . . .
A LEVEL TABLE
(4-BYTE ENTRIES)
B LEVEL TABLE $0
(4-BYTE ENTRIES)
O LEVEL TABLE $OOA
(4-BYTE ENTRIES)
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PS
x
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MOTOROLA
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