Z0847006PSG Zilog, Z0847006PSG Datasheet - Page 67

IC 6MHZ Z80 NMOS DART 40-DIP

Z0847006PSG

Manufacturer Part Number
Z0847006PSG
Description
IC 6MHZ Z80 NMOS DART 40-DIP
Manufacturer
Zilog
Series
Z80r
Datasheet

Specifications of Z0847006PSG

Processor Type
Z80
Features
Dual Channel Asynchronous Receiver/Transmitter (DART)
Speed
6MHz
Voltage
5V
Mounting Type
Through Hole
Package / Case
40-DIP (0.620", 15.75mm)
Mounting Style
Through Hole
Cpu Speed
6MHz
Digital Ic Case Style
DIP
No. Of Pins
40
Supply Voltage Range
5V
Operating Temperature Range
0°C To +70°C
Svhc
No SVHC (18-Jun-2010)
Base Number
847006
Rohs Compliant
Yes
Clock Frequency
6MHz
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
Z0847006PSG
Manufacturer:
Zilog
Quantity:
22
UM008101-0601
1. Transfer Memory-to-I/O (optional search)
2. Transfer I/O-to-Memory (optional search)
3. Transfer Memory-to-Memory (optional search)
4. Transfer I/O-to-I/O (optional search)
5. Search Memory
6. Search I/O
Modes of Operation
Figure 19.
Within any class of operation, the Z80 DMA can be programmed to operate
in one of three Transfer and/or, Search modes:
Byte Mode
Data operations are performed one byte at a time. Between each byte oper-
ation the system bus is released to the CPU. The bus is requested again for
each succeeding byte operation. This is also sometimes called Single mode
or byte-at-a-time mode.
Burst Mode
Data operations continue until a port’s Ready line to the DMA goes
inactive. The DMA then stops (releases the system bus) after completing its
current byte operation. This is also called demand mode.
Continuous Mode
Data operations continue until the end of the programmed block of data or a
stop-on-match condition is reached before the system bus is released. If a
Basic Functions of the Z80 DMA
Memory
5
3
DMA
1
2
6
4
<   % 2 7 2 G T K R J G T C N U
Direct Memory Access
7 U G T / C P W C N
I/O
I/O
 

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