Z0847006PSG Zilog, Z0847006PSG Datasheet - Page 202
Z0847006PSG
Manufacturer Part Number
Z0847006PSG
Description
IC 6MHZ Z80 NMOS DART 40-DIP
Manufacturer
Zilog
Series
Z80r
Datasheet
1.Z0847006PSG.pdf
(330 pages)
Specifications of Z0847006PSG
Processor Type
Z80
Features
Dual Channel Asynchronous Receiver/Transmitter (DART)
Speed
6MHz
Voltage
5V
Mounting Type
Through Hole
Package / Case
40-DIP (0.620", 15.75mm)
Mounting Style
Through Hole
Cpu Speed
6MHz
Digital Ic Case Style
DIP
No. Of Pins
40
Supply Voltage Range
5V
Operating Temperature Range
0°C To +70°C
Svhc
No SVHC (18-Jun-2010)
Base Number
847006
Rohs Compliant
Yes
Clock Frequency
6MHz
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
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Part Number:
Z0847006PSG
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UM008101-0601
< % 2 7 2 G T K R J G T C N U
7 U G T / C P W C N
IEI
Interrupt Enable In (input, active High). This signal is used to form a
priority interrupt daisy-chain when more than one interrupt driven device is
being used. A high level on this pin indicates that no other devices of higher
priority are being serviced by a CPU interrupt service routine.
IEO
Interrupt Enable Out (output, active High). The IEO signal is the other
signal required to form a daisy-chain priority scheme. It is High only if IEI
is High and the CPU is not servicing an interrupt from this PIO. Thus, this
signal blocks lower priority devices from interrupting while a higher
priority device is being serviced by its CPU interrupt service routine.
INT
Interrupt Request (output, open-drain, active Low). When INT is active,
the Z80 PIO is requesting an interrupt from the Z80 CPU.
A7-A0
Port A Bus (bidirectional, tristate). This 8-bit bus is used to transfer data
and/or status or control information between Port A of the Z80 PIO and a
peripheral device. A0 is the least-significant bit of the Port A data bus.
ASTB
Port A Strobe Pulse from Peripheral Device (input, active Low). The
meaning of this signal depends on the mode of operation selected for Port A
as follows:
1. Output mode: The positive edge of this strobe is issued by the peripheral
2. Input mode: The strobe is issued by the peripheral to load data from
to acknowledge the receipt of data made available by the PIO.
the peripheral into the Port A input register. Data is loaded into the
PIO when this signal is active.
Parallel Input/Output
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