Z0847006PSG Zilog, Z0847006PSG Datasheet - Page 204
Z0847006PSG
Manufacturer Part Number
Z0847006PSG
Description
IC 6MHZ Z80 NMOS DART 40-DIP
Manufacturer
Zilog
Series
Z80r
Datasheet
1.Z0847006PSG.pdf
(330 pages)
Specifications of Z0847006PSG
Processor Type
Z80
Features
Dual Channel Asynchronous Receiver/Transmitter (DART)
Speed
6MHz
Voltage
5V
Mounting Type
Through Hole
Package / Case
40-DIP (0.620", 15.75mm)
Mounting Style
Through Hole
Cpu Speed
6MHz
Digital Ic Case Style
DIP
No. Of Pins
40
Supply Voltage Range
5V
Operating Temperature Range
0°C To +70°C
Svhc
No SVHC (18-Jun-2010)
Base Number
847006
Rohs Compliant
Yes
Clock Frequency
6MHz
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
Z0847006PSG
Manufacturer:
Zilog
Quantity:
22
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UM008101-0601
< % 2 7 2 G T K R J G T C N U
7 U G T / C P W C N
Interrupt
Control
Control
CPU
Data
BUS
PIO
BRDY
Register B Ready (output, active High). The meaning of this signal is
similar to that of A Ready with the following exception: In the Port A bidi-
rectional mode, this signal is High when the Port A input register is empty
and ready to accept data from the peripheral device.
Figure 3.
Control/Data SEL
INT Enable out
INT Enable in
Port B/A SEL
Chip Enable
IORQ
GND
+5V
INT
RD
M1
D0
D1
D3
D4
D5
D6
D7
A2
Φ
PIO Pin Functions
37
20
38
40
36
19
39
35
26
11
25
23
24
22
3
2
4
1
6
5
Z80 – PIO
Parallel Input/Output
15
14
13
12
10
9
8
7
18
16
27
28
29
30
31
32
33
34
21
17
A0
A2
A3
A1
A4
A5
A6
A7
ASTB
B0
B1
B2
B3
B4
B5
B6
B7
BRDY
BSTB
ARDY
Port A
I/O
Port B
I/O
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