Z0847006PSG Zilog, Z0847006PSG Datasheet - Page 48
Z0847006PSG
Manufacturer Part Number
Z0847006PSG
Description
IC 6MHZ Z80 NMOS DART 40-DIP
Manufacturer
Zilog
Series
Z80r
Datasheet
1.Z0847006PSG.pdf
(330 pages)
Specifications of Z0847006PSG
Processor Type
Z80
Features
Dual Channel Asynchronous Receiver/Transmitter (DART)
Speed
6MHz
Voltage
5V
Mounting Type
Through Hole
Package / Case
40-DIP (0.620", 15.75mm)
Mounting Style
Through Hole
Cpu Speed
6MHz
Digital Ic Case Style
DIP
No. Of Pins
40
Supply Voltage Range
5V
Operating Temperature Range
0°C To +70°C
Svhc
No SVHC (18-Jun-2010)
Base Number
847006
Rohs Compliant
Yes
Clock Frequency
6MHz
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
Z0847006PSG
Manufacturer:
Zilog
Quantity:
22
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UM008101-0601
< % 2 7 2 G T K R J G T C N U
7 U G T / C P W C N
Daisy-Chain Interrupt Servicing
D
Figure 13.
Figure 14 illustrates a typical nested interrupt sequence that may occur in
the CTC. In this example, Channel 2 interrupts and is granted service.
While this channel is being serviced, higher priority Channel 1 interrupts
and is granted service. The service routine for the higher priority channel is
completed, and a RETI instruction is executed to signal the channel that its
routine is complete (see “Return from Interrupt Cycle” on page 29 for
further details). At this time, the service routine of the lower priority
Channel 2 is resumed and completed.
7
CLK
–D
IEO
INT
RD
M1
IEI
*INT goes Low if more interrupts are pending on the RTC.
0
T
1
Return from Interrupt Cycle
T
ED
2
T
3
T
4
T
1
T
2
4D
T
3
Counter/Timer Channels
T
4
T
1
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