SL11R Cypress Semiconductor Corp, SL11R Datasheet - Page 50

• Manufacturer Part Number: SL11R
• Description: IC MCU FULL SPD USB 16B 100LQFP
• Manufacturer: Cypress Semiconductor Corp

Specifications of SL11R

• Applications: USB Microcontroller
• Core Processor: RISC
• Program Memory Type: Mask ROM (6 kB)
• Controller Series: USB Controller
• Ram Size: 3Kx8
• Interface: 2-Wire Serial, UART, USB
• Number Of I /o: 32
• Voltage - Supply: 3 V ~ 3.6 V
• Operating Temperature: 0°C ~ 65°C
• Mounting Type: Surface Mount
• Package / Case: 100-LQFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Other names: 428-1462

GPIO and 8/16-Bit DMA Modes—Pin Assignment and Description (continued)
Document #: 38-08006 Rev. **
nXROMSEL
nXMEMSEL
nXRAMSEL
UART_TXD
nDRAMWR
nDRAMOE
Pin Name
nRESET
USB_PU
X_PCLK
nCASH
SECLK
nCASL
nWRH
nWRL
SEDO
nRAS
TEST
GND
VDD
VDD
nRD
A17
A16
A15
A14
A13
A12
A11
A10
A9
A8
A7
A6
A5
A4
A3
A2
A1
A0
Pin No. GPIO Pins Pin Type
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
GPIO31
GPIO30
GPIO29
GPIO28
Output
Output
Output
Output
Output
Output
Output
Output
Output
Output
Output
Output
Output
Output
Output
Output
Output
Output
Output
Output
Output
Output
Output
Output
Output
Output
Output
Output
Output
Output
Power
Power
GND
Input
Input
Bidir
Bidir
Bidir
Bidir
External Memory Address Bus, A17
External Memory Address Bus, A16
External Memory Address Bus, A15
External Memory Address Bus, A14
External Memory Address Bus, A13
External Memory Address Bus, A12
External Memory Address Bus, A11
External Memory Address Bus, A9
External Memory Address Bus, A8
External Memory Address Bus, A7
External Memory Address Bus, A6
External Memory Address Bus, A5
External Memory Address Bus, A4
External Memory Address Bus, A3
Digital ground.
External Memory Address Bus, A2
External Memory Address Bus, A1
External Memory Address Bus, A0
No Connection, MFG test only
Note: SL11RB NC=48 MHz, GND=12 MHz
Active LOW, write to lower bank of External SRAM
Active LOW, Write to upper bank of External SRAM
Active LOW, Read from External SRAM or ROM
Master Reset. SL11R Device active LOW reset input.
Active low, DRAM Row Address Select
+3.3 VDC Supply
+3.3 VDC Supply
Active LOW, DRAM Column Low Address Select
Active LOW, DRAM Column High Address Select
Active LOW, DRAM Output Enable
Active LOW, DRAM Write
Active LOW, select external SRAM (16 bit)
Active LOW, select external ROM
Active LOW, select external Memory bus, external SRAM, DRAM, ROM or
any memory mapped device
See register 0xC006 for more information
SECLK, Serial EEPROM clock, or GPIO31
SEDO, Serial flash EPROM Data, or GPIO30
This pin requires a 5-k pull-up.
Turn on/off D+ Pull Up Resistor, or GPIO29
UART Transmit Data (out), or GPIO28
External Memory Address Bus, A10
GPIO & 8/16-bit DMA modes Pin Chip Revision 1.1
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SL11R