SL11R Cypress Semiconductor Corp, SL11R Datasheet - Page 44

• Manufacturer Part Number: SL11R
• Description: IC MCU FULL SPD USB 16B 100LQFP
• Manufacturer: Cypress Semiconductor Corp

Specifications of SL11R

• Applications: USB Microcontroller
• Core Processor: RISC
• Program Memory Type: Mask ROM (6 kB)
• Controller Series: USB Controller
• Ram Size: 3Kx8
• Interface: 2-Wire Serial, UART, USB
• Number Of I /o: 32
• Voltage - Supply: 3 V ~ 3.6 V
• Operating Temperature: 0°C ~ 65°C
• Mounting Type: Surface Mount
• Package / Case: 100-LQFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Other names: 428-1462

5.3.6
The SL11R has a set of eight pins labeled P1-P8, which are general-purpose output pins. The functionality of each bit is selected
in the respective Control Register. The SL11R 16-bit processor has access to these pins through a read write, which is defined
in the P_REG register. The bit assignments are noted in the following table.
Note:
A write to this register causes the SL11R to write this out the corresponding GPIO pins (Except P6). The output value of the P6
will be the complement of the value written.
5.3.7
The SL11R supports subset of an industry standard SPI serial interface, which provides the interface to serial interface device
like Multi-Media or Memory Stick interface.
5.3.7.1 Serial Interface Control & Status Register
The Serial Interface port of the SL11R can be used to control certain aspects of the interface to serial Memory Flash devices.
There are cycles (Address, Write or Read) are implemented on this mode.
5.3.7.2 Serial Interface Address Register
5.3.7.3 Serial Interface Data Write Register
Document #: 38-08006 Rev. **
D7-D0
D7-1
D0
A7-A0: Address value. Writing a value to this register results in an address cycle on the serial bus. The Busy bit in the status
register (C048H) goes to '1' (high) until cycle has completed.
TD7-0: Data to be transmitted. Writing to this register initiates a write cycle on the serial data bus. The busy bit in the status
register (C048H) goes to '1' (high) until the cycle has completed.
EPP P_REG Register (0xC050: R/W)
Serial Interface Registers
(GPIO15)
TD7
D7
P8
D7
D7
A7
D7
0
P8-P1
Not Defined.
B - Busy. When Set = '1', indicates a cycle is in progress.
Cleared to '0' when the cycle has completed. No new cycles are allowed until Busy bit = '0'.
(GPIO14)
TD6
D6
P7
D6
D6
A6
D6
0
(!GPIO13)
Set to logic ‘1’ or ‘0’ for corresponding P output pin
TD5
D5
P6
D5
D5
A5
D5
0
(GPIO20)
TD4
D4
P5
D4
D4
A4
D4
0
Address C048H
Address C04AH
Address C04CH
(GPIO19)
TD3
D3
P4
D3
D3
A3
D3
0
(GPIO18)
TD2
D2
D2
D2
D2
P3
A2
0
(GPIO17)
TD1
D1
D1
D1
D1
P2
A1
0
(GPIO16)
TD0
D0
D0
D0
D0
P1
A0
B
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SL11R