SL11R Cypress Semiconductor Corp, SL11R Datasheet - Page 63

• Manufacturer Part Number: SL11R
• Description: IC MCU FULL SPD USB 16B 100LQFP
• Manufacturer: Cypress Semiconductor Corp

Specifications of SL11R

• Applications: USB Microcontroller
• Core Processor: RISC
• Program Memory Type: Mask ROM (6 kB)
• Controller Series: USB Controller
• Ram Size: 3Kx8
• Interface: 2-Wire Serial, UART, USB
• Number Of I /o: 32
• Voltage - Supply: 3 V ~ 3.6 V
• Operating Temperature: 0°C ~ 65°C
• Mounting Type: Surface Mount
• Package / Case: 100-LQFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Other names: 428-1462

Note: For the JUMP mnemonics, adding an “L” to the end indicates a long or absolute jump. Adding an “S” to the end indicates
a short or relative jump. If nothing is added, the assembler will choose “S” or “L.”
7.19
Since Single operand instructions do not require a source field, the format of the Single operand Operation instructions is slightly
different.
Notice that the opcode field is expanded to seven bits wide. The four most significant bits for all instructions of this class are
“1101.”
In addition, there is space for an optional three bit immediate value, which is used in a manner appropriate to the instruction. The
destination field functions exactly as it does in the dual operand operation instructions.
Note:
destination:= destination >> count
Flags Affected: Z, C, S
Note:
Document #: 38-08006 Rev. **
Z
NZ
C / B
NC / AE
S
NS
O
NO
A / NBE
BE / NA
G / NLE
GE / NL
L / NGE
LE / NG
(not used)
Unconditional
Instruction
bit:
SHR
bit:
• For the SHR, SHL, ROR, ROL, ADDI and SUBI instructions, the three-bit count or n operand is incremented by 1 before it is used.
• The SL11R QT assembler takes this into account.
• The SHR instruction shifts in sign bits.
• The C flag is set with last bit shifted out of LSB.
Condition
Single Operand Operation Instructions
15
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
14
13
0000
0001
0010
0011
0100
0101
0110
0111
1000
1001
1010
1011
1100
1101
1110
1111
cccc Bits
1101000
1101***
12
11
Z=1
Z=0
C=1
C=0
S=1
S=0
O=1
O=0
(Z=0 AND C=0)
(Z=1 OR C=1)
(O= S AND Z=0)
(O=S)
(O S)
(O S OR Z=1)
Unconditional
10
Description
9
[param]
8
count-1
7
JZ
JNZ
JC
JNC
JS
JNS
JO
JNO
JA
JBE
JG
JGE
JL
JLE
JMP
destination
JUMP mnemonic
6
5
4
destination
3
CZ
CNZ
CC
RNC
CS
CNS
CO
CNO
CA
CBE
CG
CGE
CL
CLE
CALL
2
CALL mnemonic
1
0
RZ
RNZ
RC
RNC
RS
RNS
RO
RNO
RA
RBE
RG
RGE
RL
RLE
RET
RET mnemonic
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SL11R