SL11R Cypress Semiconductor Corp, SL11R Datasheet - Page 19

• Manufacturer Part Number: SL11R
• Description: IC MCU FULL SPD USB 16B 100LQFP
• Manufacturer: Cypress Semiconductor Corp

Specifications of SL11R

• Applications: USB Microcontroller
• Core Processor: RISC
• Program Memory Type: Mask ROM (6 kB)
• Controller Series: USB Controller
• Ram Size: 3Kx8
• Interface: 2-Wire Serial, UART, USB
• Number Of I /o: 32
• Voltage - Supply: 3 V ~ 3.6 V
• Operating Temperature: 0°C ~ 65°C
• Mounting Type: Surface Mount
• Package / Case: 100-LQFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Other names: 428-1462

Note:
4.5.4
Note:
4.6
See the USB Endpoint 3 Control & Status Register for more information.
4.7
See the USB Endpoint 3 Control & Status Register for more information.
4.8
See the USB Endpoint 3 Control & Status Register for more information.
4.9
4.9.1
The SL11R Controller supports four endpoints. Endpoint 0 is the default pipe and is used to initialize and control the peripheral
device. It also provides access to the peripheral device's configuration information, and supports control transfers. Endpoint 1, 2,
and 3 support interrupt transfers, bulk transfers up to 64 Bytes/packet, or Isochronous transfers up to 1024 Bytes/packet size.
4.9.2
Each of the endpoint Control Registers when written have the following functions assigned:
Document #: 38-08006 Rev. **
Bit Position
• The SL11R BIOS modifies this register upon receiving the SET_ADDRESS from the host. (See [Ref. 3] Universal Serial Bus
• The SL11R BIOS modifies this register upon command completion on endpoint 0.
Specification 1.1, Chapter 9 for more information)
D6-D15
D0
D1
D2
D3
D4
D5
D15-D7
D6-D0
D15-D1
D0
D15
0
USB Command Done Register (0xC086: Write Only)
This is the USB command done register. It is only used by the control point (endpoint 0).
USB Endpoint 0 Control & Status Register (0xC090: R/W)
USB Endpoint 1 Control & Status Register (0xC092: R/W)
USB Endpoint 2 Control & Status Register (0xC094: R/W)
USB Endpoint 3 Control & Status Register (0xC096: R/W)
General Description for All Endpoints from Endpoint 0 to Endpoint 3
USB Endpoints Control (For Writing)
D14
Zero Length
0
Not Defined
Bit Name
Enable
ARM
Stall
DIR
ISO
D13
Reserved
A6-A0
Reserved
E
0
D12
0
Allows enabled transfers when set to '1'. Cleared to '0' when transfer is complete
When set to ‘1’ it allows transfers to this endpoint. When set to '0' USB transactions are ignored.
If enable = '1' and Arm = '0', the endpoint will return NAK to USB transmissions.
When set to ‘1’, It transmits to Host (IN). When '0' receive from Host (OUT)
When set to ‘1’ It sends Stall in response to next request on this endpoint
When set to ‘1’ It sends a zero length packet
Set to logic ‘0’s
When set to '1' It allows Isochronous mode for this endpoint
D11
0
set to all zeros
USB Address of device after assignment by Host
set to all zeros.
Set E=0 for Successful Command Completion
Set E=1 for Error Command Completion
D10
0
D9
0
D8
0
D7
0
D6
Function
0
D5
0
D4
0
D3
0
D2
0
D1
0
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SL11R
D0
E