SL11R Cypress Semiconductor Corp, SL11R Datasheet - Page 43

• Manufacturer Part Number: SL11R
• Description: IC MCU FULL SPD USB 16B 100LQFP
• Manufacturer: Cypress Semiconductor Corp

Specifications of SL11R

• Applications: USB Microcontroller
• Core Processor: RISC
• Program Memory Type: Mask ROM (6 kB)
• Controller Series: USB Controller
• Ram Size: 3Kx8
• Interface: 2-Wire Serial, UART, USB
• Number Of I /o: 32
• Voltage - Supply: 3 V ~ 3.6 V
• Operating Temperature: 0°C ~ 65°C
• Mounting Type: Surface Mount
• Package / Case: 100-LQFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Other names: 428-1462

5.3.1
Writing to this register results in the generation of a pulse on the nDTSRB output pin, with the nWRITE output pin low, and the
register data being driven onto the SD7-SD0 Data bus.
Reading from this register results in the generation of a pulse on the nDTSRB output pin, with the nWRITE output pin high, and
data being read from the SD7-SD0 Data bus.
5.3.2
Writing to this register results in the generation of a pulse on the nASTRB output pin, with the nWRITE output pin low, and the
register data being driven onto the SD7-SD0 Data bus.
Reading from this register results in the generation of a pulse on the nASTRB output pin, with the nWRITE output pin high, and
data being read from the SD7-SD0 Data bus.
5.3.3
Reading this register returns existing data from Read Buffer to the I/O processor. The nASTRB will not be asserted.
5.3.4
Reading this register returns existing data from Read Buffer to the I/O processor. The nDTSRB will not be asserted
5.3.5
This register is used to read the actual status signal from GPIO9-8. The P9 pin will be set to the value in D7 when written. GPIO8
and GPIO9 are not affected by writing to this register.
Document #: 38-08006 Rev. **
D7-D0
D7-D0
D7-D0
D7-D0
D7
D1
D0
EPP Data Register (0xC040: R/W)
EPP Address Register (0xC044: R/W)
EPP Address Buffer Read Register (0xC046: Read Only)
EPP Data Buffer Read Register (0xC042: Read Only)
EPP Status Data Register (0xC04E: R/W)
SD7
SD7
D7
D7
A7
D7
A7
D7
SD7-SD0
A7-A0
A7-A0
SD7-SD0
P9
INTR
WAIT
P9 (GPIO21)
SD6
SD6
D6
D6
A6
D6
A6
D6
D7
EPP data
Device and register address value from the SD7-SD0 Data Bus.
Read Data
EPP data from the SD7-SD0 data bus.
Value output on GPIO21.
from the GPIO8
line from GPIO9.
SD5
SD5
D5
D5
A5
D5
A5
D5
D6
0
D5
0
SD4
SD4
D4
D4
A4
D4
A4
D4
D4
0
SD3
SD3
D3
D3
A3
D3
A3
D3
D3
0
D2
0
SD2
SD2
D2
D2
D2
D2
A2
A2
INTR
D1
SD1
SD1
D1
D1
D1
D1
A1
A1
WAIT
D0
SD0
SD0
D0
D0
D0
D0
A0
A0
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SL11R