EP3C5M164C7N Altera, EP3C5M164C7N Datasheet - Page 167
EP3C5M164C7N
Manufacturer Part Number
EP3C5M164C7N
Description
IC CYCLONE III FPGA 5K 164 MBGA
Manufacturer
Altera
Series
Cyclone® IIIr
Datasheets
1.EP3C5F256C8N.pdf
(5 pages)
2.EP3C5F256C8N.pdf
(34 pages)
3.EP3C5F256C8N.pdf
(66 pages)
4.EP3C5F256C8N.pdf
(14 pages)
5.EP3C5F256C8N.pdf
(76 pages)
6.EP3C5M164C7N.pdf
(274 pages)
Specifications of EP3C5M164C7N
Number Of Logic Elements/cells
5136
Number Of Labs/clbs
321
Total Ram Bits
423936
Number Of I /o
106
Voltage - Supply
1.15 V ~ 1.25 V
Mounting Type
Surface Mount
Operating Temperature
0°C ~ 85°C
Package / Case
164-MBGA
Family Name
Cyclone III
Number Of Logic Blocks/elements
5136
# I/os (max)
106
Frequency (max)
437.5MHz
Process Technology
65nm
Operating Supply Voltage (typ)
1.2V
Logic Cells
5136
Ram Bits
423936
Operating Supply Voltage (min)
1.15V
Operating Supply Voltage (max)
1.25V
Operating Temp Range
0C to 85C
Operating Temperature Classification
Commercial
Mounting
Surface Mount
Pin Count
164
Package Type
MBGA
For Use With
544-2601 - KIT DEV CYCLONE III LS EP3CLS200544-2411 - KIT DEV NIOS II CYCLONE III ED.
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Number Of Gates
-
Lead Free Status / Rohs Status
Compliant
Other names
544-2559
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
EP3C5M164C7N
Manufacturer:
ALTERA
Quantity:
526
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Chapter 9: Configuration, Design Security, and Remote System Upgrades in the Cyclone III Device Family
Configuration Features
© December 2009
f
Altera Corporation
Configuration File Size
Table 9–3
device family. To calculate the amount of storage space required for multiple device
configurations, add the file size of each device together.
.
Table 9–3. Cyclone III Device Family Uncompressed Raw Binary File (.rbf) Sizes
Use the data in
Different configuration file formats, such as Hexadecimal (.hex) or Tabular Text
File (.ttf) formats, have different file sizes. However, for any specific version of the
Quartus II software, any design targeted for the same device has the same
uncompressed configuration file size. If you are using compression, the file size varies
after each compilation because the compression ratio is design dependent.
For more information about setting device configuration options or creating
configuration files, refer to the
Configuration Handbook.
Configuration and JTAG Pin I/O Requirements
Cyclone III devices are manufactured using the TSMC 65-nm low-k dielectric process;
Cyclone III LS devices are manufactured using the TSMC 60-nm low-k dielectric
process. Although Cyclone III device family uses TSMC 2.5-V transistor technology in
the I/O buffers, the devices are compatible and able to interface with 2.5-, 3.0-, 3.3-V
configuration voltage standards. However, you must follow specific requirements
when interfacing Cyclone III device family with 2.5-, 3.0-, 3.3-V configuration voltage
standards.
All I/O inputs must maintain a maximum AC voltage of 4.1 V. When using a JTAG
configuration scheme or a serial configuration device in an AS configuration scheme,
you must connect a 25-Ω series resistor at the near end of the TDO and TDI pin or the
serial configuration device for the DATA[0]pin. When cascading Cyclone III device
family in a multi-device configuration, you must connect the repeater buffers between
the master and slave devices for DATA and DCLK.
Note to
(1) These values are preliminary.
Cyclone III LS
Cyclone III
Table
lists the approximate uncompressed configuration file sizes for Cyclone III
9–3:
Table 9–3
Device
only to estimate the file size before design compilation.
EP3CLS100
EP3CLS150
EP3CLS200
EP3CLS70
EP3C120
EP3C10
EP3C16
EP3C25
EP3C40
EP3C55
EP3C80
EP3C5
Software Settings
section in volume 2 of the
Cyclone III Device Handbook, Volume 1
Data Size (bits)
25,165,824
25,165,824
50,331,648
50,331,648
14,900,000
20,000,000
28,600,000
3,000,000
3,000,000
4,100,000
5,800,000
9,600,000
(1)
(1)
(1)
(1)
9–7
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