EP3C5M164C7N Altera, EP3C5M164C7N Datasheet - Page 166
EP3C5M164C7N
Manufacturer Part Number
EP3C5M164C7N
Description
IC CYCLONE III FPGA 5K 164 MBGA
Manufacturer
Altera
Series
Cyclone® IIIr
Datasheets
1.EP3C5F256C8N.pdf
(5 pages)
2.EP3C5F256C8N.pdf
(34 pages)
3.EP3C5F256C8N.pdf
(66 pages)
4.EP3C5F256C8N.pdf
(14 pages)
5.EP3C5F256C8N.pdf
(76 pages)
6.EP3C5M164C7N.pdf
(274 pages)
Specifications of EP3C5M164C7N
Number Of Logic Elements/cells
5136
Number Of Labs/clbs
321
Total Ram Bits
423936
Number Of I /o
106
Voltage - Supply
1.15 V ~ 1.25 V
Mounting Type
Surface Mount
Operating Temperature
0°C ~ 85°C
Package / Case
164-MBGA
Family Name
Cyclone III
Number Of Logic Blocks/elements
5136
# I/os (max)
106
Frequency (max)
437.5MHz
Process Technology
65nm
Operating Supply Voltage (typ)
1.2V
Logic Cells
5136
Ram Bits
423936
Operating Supply Voltage (min)
1.15V
Operating Supply Voltage (max)
1.25V
Operating Temp Range
0C to 85C
Operating Temperature Classification
Commercial
Mounting
Surface Mount
Pin Count
164
Package Type
MBGA
For Use With
544-2601 - KIT DEV CYCLONE III LS EP3CLS200544-2411 - KIT DEV NIOS II CYCLONE III ED.
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Number Of Gates
-
Lead Free Status / Rohs Status
Compliant
Other names
544-2559
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
EP3C5M164C7N
Manufacturer:
ALTERA
Quantity:
526
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9–6
Table 9–2. Cyclone III Device Family Supported POR Times Across Configuration Schemes
Cyclone III Device Handbook, Volume 1
Active Parallel ×16 Standard (AP Standard POR, for
Cyclone III devices only)
Active Parallel ×16 Standard (AP Standard POR, for
Cyclone III devices only)
Active Parallel ×16 Standard (AP Standard POR, for
Cyclone III devices only)
Active Parallel ×16 Fast (AP Fast POR, for
Cyclone III devices only)
Active Parallel ×16 Fast (AP Fast POR, for
Cyclone III devices only)
Passive Serial Standard (PS Standard POR)
Passive Serial Fast (PS Fast POR)
Fast Passive Parallel Fast (FPP Fast POR)
Fast Passive Parallel Fast (FPP Fast POR)
JTAG-based configuration
Notes to
(1) Altera recommends connecting the MSEL pins to V
(2) The configuration voltage standard is applied to the V
(3) JTAG-based configuration takes precedence over other configuration schemes, which means the MSEL pin settings are ignored. However, the
POR time is dependent on the MSEL pin settings.
Table
f
9–2:
Configuration Scheme
1
In some applications, it is necessary for a device to wake up very quickly to begin
operation. The Cyclone III device family offers the fast POR time option to support
fast wake-up time applications. The fast POR time option has stricter power-up
requirements when compared with the standard POR time option. You can select
either the fast POR or standard POR options with the MSEL pin settings.
The automotive application is for Cyclone III devices only. The Cyclone III devices
fast wake-up time meets the requirement of common bus standards in automotive
applications, such as Media Orientated Systems Transport (MOST) and Controller
Area Network (CAN).
For more information about wake-up time and the POR circuit, refer to the
Hot-Socketing and Power-On Reset in Cyclone III Devices
Chapter 9: Configuration, Design Security, and Remote System Upgrades in the Cyclone III Device Family
CCA
C CIO
or GND depending on the MSEL pin settings.
supply of the bank in which the configuration pins reside.
(3 ms< TPOR < 9 ms)
Fast POR Time
(3)
v
v
v
v
v
—
—
—
—
(50 ms< TPOR < 200 ms)
Standard POR Time
chapter.
(3)
v
v
v
v
—
—
—
—
—
© December 2009 Altera Corporation
(Note 1)
(Part 2 of 2)
Configuration Features
Standard
Configuration
3.3/3.0/2.5
3.3/3.0/2.5
3.3/3.0/2.5
Voltage
3.0/2.5
1.8/1.5
3.3
1.8
3.3
1.8
—
(V)(2)
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