EPM1270F256C3 Altera, EPM1270F256C3 Datasheet - Page 62
![IC MAX II CPLD 1270 LE 256-FBGA](/photos/6/70/67063/544-256-fbga_sml.jpg)
EPM1270F256C3
Manufacturer Part Number
EPM1270F256C3
Description
IC MAX II CPLD 1270 LE 256-FBGA
Manufacturer
Altera
Series
MAX® IIr
Specifications of EPM1270F256C3
Programmable Type
In System Programmable
Delay Time Tpd(1) Max
6.2ns
Voltage Supply - Internal
2.5V, 3.3V
Number Of Logic Elements/blocks
1270
Number Of Macrocells
980
Number Of I /o
212
Operating Temperature
0°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
256-FBGA
Voltage
2.5V, 3.3V
Memory Type
FLASH
Number Of Logic Elements/cells
1270
Family Name
MAX II
# Macrocells
980
Frequency (max)
3.01205GHz
Propagation Delay Time
6.2ns
Number Of Logic Blocks/elements
127
# I/os (max)
212
Operating Supply Voltage (typ)
2.5/3.3V
In System Programmable
Yes
Operating Supply Voltage (min)
2.375V
Operating Supply Voltage (max)
3.6V
Operating Temp Range
0C to 85C
Operating Temperature Classification
Commercial
Mounting
Surface Mount
Pin Count
256
Package Type
FBGA
For Use With
544-2380 - KIT DEV MAXII W/EPM 1270N
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Features
-
Lead Free Status / Rohs Status
Not Compliant
Other names
544-1321
EPM1270F256C3
EPM1270F256C3
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
EPM1270F256C3N
Manufacturer:
ALTERA
Quantity:
162
Part Number:
EPM1270F256C3N
Manufacturer:
ALTERA/阿尔特拉
Quantity:
20 000
5–4
Table 5–4. MAX II Device DC Electrical Characteristics
MAX II Device Handbook
I
C
C
Notes to
(1) Typical values are for T
(2) This value is specified for normal device operation. The value may vary during power-up. This applies for all V
(3) V
(4) Commercial temperature ranges from 0°C to 85°C with maximum current at 85°C.
(5) Industrial temperature ranges from –40°C to 100°C with maximum current at 100°C.
(6) This value applies to commercial and industrial range devices. For extended temperature range devices, the V
(7) The TCK input is susceptible to high pulse glitches when the input signal fall time is greater than 200 ns for all I/O standards.
(8) This is a peak current value with a maximum duration of t
(9) Pin pull-up resistance values will lower if an external source drives the pin higher than V
PULLUP
IO
GCLK
Symbol
1.8, and 1.5 V).
300 mV for V
I
= ground, no load, no toggling inputs.
Table
5–4:
I/O pin pull-up resistor
current when I/O is
unprogrammed
Input capacitance for
user I/O pin
Input capacitance for
dual-purpose
GCLK/user I/O pin
CC IO
= 3.3 V and 120 mV for V
Parameter
A
= 25°C, V
CCINT
= 3.3 or 2.5 V, and V
C CIO
= 2.5 V.
Conditions
—
—
—
CONFIG
CC IO
(Note 1)
= 1.5 V, 1.8 V, 2.5 V, or 3.3 V.
time.
(Part 2 of 2)
Minimum
—
—
—
C CIO
.
Typical
Chapter 5: DC and Switching Characteristics
—
—
—
Maximum
© August 2009 Altera Corporation
S CHM ITT
300
C CIO
8
8
settings (3.3, 2.5,
typical value is
Operating Conditions
Unit
µA
pF
pF