LE58QL063HVC Zarlink, LE58QL063HVC Datasheet - Page 86

• Manufacturer Part Number: LE58QL063HVC
• Description: SLIC 4-CH 3.3V 64-Pin LQFP Tray
• Manufacturer: Zarlink

Specifications of LE58QL063HVC

• Package: 64LQFP
• Number Of Channels Per Chip: 4
• Polarity Reversal: Yes
• Minimum Operating Supply Voltage: 3.135 V
• Typical Operating Supply Voltage: 3.3 V

APPLICATIONS
The QLSLAC device performs a programmable codec/filter function for four telephone lines. It interfaces to the telephone lines
through a Zarlink SLIC device or a transformer with external buffering. The QLSLAC device provides latched digital I/O to control
and monitor four SLIC devices and provides access to time-critical information, such as off/on-hook and ring trip, for all four
channels via a single read operation or via the upstream C/I bits in the GCI SC channel. When various country or transmission
requirements must be met, the QLSLAC device enables a single SLIC device design for multiple applications. The line
characteristics (such as apparent impedance, attenuation, and hybrid balance) can be modified by programming each QLSLAC
device channel’s coefficients to meet desired performance. The QLSLAC device may require an external buffer to drive
transformer SLIC devices.
In PCM/MPI mode, connection to a PCM back plane is implemented by means of a simple buffer chip. Several QLSLAC devices
can be tied together in one bus interfacing the back plane through a single buffer. An intelligent bus interface chip is not required
because each QLSLAC device provides its own buffer control (TSCA/TSCB). The QLSLAC device is controlled through the
microprocessor interface, either by a microprocessor on the line card or by a central processor.
In GCI mode, the QLSLAC device decodes the S0 and S1 inputs and determines the DCL frequency, 2.048 MHz or 4.096 MHz
automatically. The QLSLAC device transmits and receives the GCI channel information in accordance with S0, S1 and DCL,
synchronized by Frame Sync. (FSC). Up to four QLSLAC devices can be bussed together forming one bidirectional 16 channel
GCI bus. A simple inexpensive buffer should be used between the GCI bus and the backplane of the system.
Controlling the SLIC Device
The Le58QL061 QLSLAC device has five TTL-compatible I/O pins (CD1, CD2, C3, C4 and C5) for each channel. The
Le58QL063 device has two additional outputs (C6, C7) per channel. The outputs are programmed using MPI Command 52h or
the downstream C/I bits in the GCI SC channel. The logic states are read back using MPI Command 53h or GCI Command SOP
10. In GCI mode CD1 (debounced), CD2, and C3 are also present on the upstream C/I bits in the GCI SC channel. In PCM/MPI
mode, CD1 and CD2 for all four channels can be read back using MPI Command 4D/4Fh. The direction of the I/O pins (input or
output) is specified by programming the SLIC device I/O direction register (MPI Command 54/55h, GCI Command SOP 8).
Calculating Coefficients with WinSLAC Software
The WinSLAC software is a program that models the QLSLAC device, the line conditions, the SLIC device, and the line card
components to obtain the coefficients of the programmable filters of the QLSLAC device and some of the transmission
performance plots.
The following parameters relating to the desired line conditions and the components/circuits used in the line card are to be
provided as input to the program:
1.
2.
3.
4.
5.
6.
7.
The output from the WinSLAC program includes the coefficients of the GR, GX, Z, R, X, and B filters as well as transmission
performance plots of two-wire return loss, receive and transmit path frequency responses, and four-wire return loss.
The software supports the use of the Zarlink SLIC devices or allows entry of a SPICE netlist describing the behavior of any type
of SLIC device circuit.
Line impedance or the balance impedance of the line is specified by the local telephone system.
Desired two-wire impedance that is to appear at the line card terminals of the exchange.
Tabular data for templates describing the frequency response and attenuation distortion of the design.
Relative analog signal levels for both the transmit and receive two-wire signals.
Component values and SLIC device selection for the analog portion of the line circuits.
Two-wire return loss template is usually specified by the local telephone system.
Four-wire return loss template is usually specified by the local telephone system.
Zarlink Semiconductor Inc.
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