LE58QL063HVC Zarlink, LE58QL063HVC Datasheet - Page 76

• Manufacturer Part Number: LE58QL063HVC
• Description: SLIC 4-CH 3.3V 64-Pin LQFP Tray
• Manufacturer: Zarlink

Specifications of LE58QL063HVC

• Package: 64LQFP
• Number Of Channels Per Chip: 4
• Polarity Reversal: Yes
• Minimum Operating Supply Voltage: 3.135 V
• Typical Operating Supply Voltage: 3.3 V

The format in the upstream direction is the same except that the command byte is omitted.
Details of COP, CSD Data Commands
This section describes in detail each of the monitor channel COP commands. Each of the commands is shown along with the
format of any additional data bytes that follow. For details of the filter coefficients of the form C
Description of Coefficients section on
COP 1. Write/Read AISN Coefficients and Analog Gains
Disable Input Attenuator (GIN)
Transmit analog gain
Receive Analog Loss
AISN coefficient
* Power Up and Hardware Reset (RST) Value = 00h
COP 2. Write/Read GX Filter Coefficients
Cxy = 0 or 1 in the command above corresponds to Cxy = +1 or −1, respectively, in the equation below.
The coefficient for the GX filter is defined as:
Command
I/O Data
Command
Coefficient Byte 1
Coefficient Byte 2
GCI Command
(50/51h)
R/W = 0: Write
R/W = 1: Read
GCI Command
(80/81h)
R/W = 0: Write
R/W = 1: Read
h
AISN
DGIN = 0*
DGIN = 1
AX = 0*:
AX = 1:
AR = 0*:
AR = 1:
AISN = 0*–31 See below (Default value = 0)
The Analog Impedance Scaling Network (AISN) gain can be varied from −0.9375 • GIN to +0.9375 • GIN in
multiples of 0.0625 • GIN. The gain coefficient is decoded using the following equation:
where h
H
=
GX
0.0625 GIN
AISN
=
(
1
is the gain of the AISN. A value of AISN = 10000 turns on the Full Digital Loopback mode.
•
+
(
C10 2
page
Input attenuator on
Input attenuator off
0 dB gain
6.02 dB gain
0 dB loss
6.02 dB loss
[
(
16 AISN4
•
82.
DGIN
–
•
C40
C20
D
D
m10
0
1
7
7
(
1
Zarlink Semiconductor Inc.
+
C20 2
+
AX
D
D
1
0
8 AISN3
6
6
•
•
76
–
m20
m40
m20
AR
D
D
0
0
5
5
(
+
1
4 AISN2
+
•
C30 2
AISN4
D
D
1
0
4
4
•
–
m30
+
ASIN3
C30
C10
2 AISN1
D
D
0
0
3
3
(
•
1
+
C40 2
AISN2
D
D
0
0
2
2
+
•
AISN0
–
m40
AISN1
m30
m10
xy
D
D
)
0
0
)
m
1
1
) 16
)
–
)
xy
)
, please refer to the
AISN0
]
W/R
W/R
D
D
0
0