LE58QL063HVC Zarlink, LE58QL063HVC Datasheet - Page 66

• Manufacturer Part Number: LE58QL063HVC
• Description: SLIC 4-CH 3.3V 64-Pin LQFP Tray
• Manufacturer: Zarlink

Specifications of LE58QL063HVC

• Package: 64LQFP
• Number Of Channels Per Chip: 4
• Polarity Reversal: Yes
• Minimum Operating Supply Voltage: 3.135 V
• Typical Operating Supply Voltage: 3.3 V

Programming with the Monitor Channel
The QLSLAC device uses the monitor channel for the transfer of status or mode information to and from higher level processors.
The messages transmitted in the monitor channel have different data structures. The first byte of monitor channel data indicates
the address of the device either sending or receiving the data.
All Monitor channel messages to and from the QLSLAC device begin with the following address byte::
A = 0; Channel 1 is the source (upstream) or destination (downstream)
A = 1; Channel 2 is the source (upstream) or destination (downstream)
B = 0; Data destination determined by A
B = 1; Both channels, 1 and 2, receive the data
C = 0; Address for channel identification command
C = 1; Address for all other commands
Address
MX
New Byte
Received
1st Byte
MR = 1
MR = 0
MR = 0
MR = 1
Valid
Byte
Idle
MX
MX
MX
•
Figure 30. Monitor Receiver State Diagram
LL
MX
MX
MR: MR bit transmitted on DU line
MX: MX bit received on DD line
LL: Last look at monitor byte received
ABT: Abort indication from internal source
D
1
7
•
MX
Zarlink Semiconductor Inc.
LL
D
0
6
MX
MX
Received
nth Byte
66
MR = 1
MR = 1
Abort
D
0
5
D
A
MX
4
ABT
Initial
State
State
Any
MX
•
LL
D
B
•
3
LL
MX
D
0
2
•
MX
LL MR = 0
LL MR = 0
LL
Wait for
Wait for
D
0
1
MX
D
C
0
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