MT45W256KW16BEGB-708 WT Micron Technology Inc, MT45W256KW16BEGB-708 WT Datasheet - Page 51
![](/photos/31/34/313423/557-54-vfbga_sml.jpg)
MT45W256KW16BEGB-708 WT
Manufacturer Part Number
MT45W256KW16BEGB-708 WT
Description
Manufacturer
Micron Technology Inc
Datasheet
1.MT45W256KW16BEGB-708_WT.pdf
(58 pages)
Specifications of MT45W256KW16BEGB-708 WT
Operating Temperature (max)
85C
Mounting
Surface Mount
Operating Temperature Classification
Commercial
Lead Free Status / Rohs Status
Compliant
Figure 43:
PDF: 09005aef8329f3e3 / Source: 09005aef82e419a5
8mb_4mb_burst_cr1_0_p22z__2.fm - Rev. B 4/ 08 EN
DQ[15:0]
LB#/UB#
IN/OUT
A[17:0]
ADV#
WAIT
WE#
OE#
CLK
CE#
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
IH
IL
IH
IL
IH
IL
IH
IL
IH
IL
IH
IL
IH
IL
OH
OL
IH
IL
Asynchronous WRITE Followed by Burst READ
t VPH
High-Z
t WHZ
t AS
t AVS
Notes:
t CVS
address
t VP
t CW
Valid
t DH
t WC
t WP
Data
t AVH
t WPH
t WC
1. Nondefault BCR settings for asynchronous WRITE followed by burst READ: latency code 2 (3
2. When configured for synchronous mode (BCR[15] = 0), a refresh opportunity must be pro-
t AW
clocks); WAIT active LOW; WAIT asserted during delay.
vided every
tions: clocked CE# HIGH or CE# HIGH for greater than 15ns. Note that the CellularRAM
Workgroup 1.0 specification requires CE# to be clocked HIGH to terminate the burst.
t BW
t VS
address
t AS
Valid
Data
t WC
t WR
t DW
4Mb: 256K x 16 Async/Page/Burst CellularRAM 1.0 Memory
t CKA
t
CEM. A refresh opportunity is satisfied by either of the following two condi-
t CBPH
2
t CSP
V
V
t SP
t CEW
t SP
OH
address
OL
t SP
t SP t HD
Valid
t HD
t HD
t CLK
High-Z
51
t ABA
t ACLK
Micron Technology, Inc., reserves the right to change products or specifications without notice.
t BOE
output
Valid
t KOH
output
Valid
Don’t Care
output
©2008 Micron Technology, Inc. All rights reserved.
Valid
Timing Diagrams
output
Valid
t OHZ
Undefined
High-Z