MT45W256KW16BEGB-708 WT Micron Technology Inc, MT45W256KW16BEGB-708 WT Datasheet - Page 36
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MT45W256KW16BEGB-708 WT
Manufacturer Part Number
MT45W256KW16BEGB-708 WT
Description
Manufacturer
Micron Technology Inc
Datasheet
1.MT45W256KW16BEGB-708_WT.pdf
(58 pages)
Specifications of MT45W256KW16BEGB-708 WT
Operating Temperature (max)
85C
Mounting
Surface Mount
Operating Temperature Classification
Commercial
Lead Free Status / Rohs Status
Compliant
Table 13:
Figure 28:
Table 14:
PDF: 09005aef8329f3e3 / Source: 09005aef82e419a5
8mb_4mb_burst_cr1_0_p22z__2.fm - Rev. B 4/ 08 EN
Parameter
Parameter
CE# HIGH between subsequent burst and
mixed-mode operations
Minimum CE# pulse width
CE# LOW to WAIT valid
Clock period
CE# setup to CLK active edge
Hold time from active CLK edge
Chip disable to WAIT High-Z output
CLK rise or fall time
Clock to WAIT valid
CLK HIGH or LOW time
Setup time to active CLK edge
Initialization period (required before normal operations)
Burst WRITE Cycle Timing Requirements
Initialization Timing Parameters
Initialization Period
Notes:
1. When configured for synchronous mode (BCR[15] = 0), a refresh opportunity must be pro-
Vcc, VccQ = 1.7V
vided every
conditions: clocked CE# HIGH or CE# HIGH for greater than 15ns.
4Mb: 256K x 16 Async/Page/Burst CellularRAM 1.0 Memory
t
CEM. A refresh opportunity is satisfied by either of the following two
Symbol
t
t
t
t
t
CBPH
KHKL
t
KHTL
t
CEM
CEW
t
t
t
CLK
CSP
t
HD
HZ
KP
SP
36
Min
9.62
5
–
1
3
2
–
–
–
3
3
t
PU
104 MHz
Micron Technology, Inc., reserves the right to change products or specifications without notice.
Max
7.5
1.6
–
8
–
–
–
8
7
–
–
Symbol
t
PU
normal operation
Device ready for
Min
12.5
4.5
5
–
1
2
–
–
–
4
3
80 MHz
Vcc (MIN)
Min
Timing Requirements
–
Max
©2008 Micron Technology, Inc. All rights reserved.
7.5
1.8
–
8
–
–
–
8
9
–
–
-70
Max
150
Unit
ns
µs
ns
ns
ns
ns
ns
ns
ns
ns
ns
Unit
Notes
µs
1
1