MT48LC16M16LFFG Micron Technology Inc, MT48LC16M16LFFG Datasheet - Page 44
MT48LC16M16LFFG
Manufacturer Part Number
MT48LC16M16LFFG
Description
Manufacturer
Micron Technology Inc
Datasheet
1.MT48LC16M16LFFG.pdf
(61 pages)
Specifications of MT48LC16M16LFFG
Lead Free Status / Rohs Status
Not Compliant
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NOTE: 1. Each AUTO REFRESH command performs a refresh cycle. Back-to-back commands are not required.
TIMING PARAMETERS
256Mb: x16 Mobile SDRAM
MobileRamY26L_B.p65 – Pub. 04/03
*CAS latency indicated in parentheses.
A0-A9, A11, A12
SYMBOL*
t
t
t
t
t
t
AH
AS
CH
CL
CK (3)
CK (2)
DQML, DQMU
COMMAND
DQM /
BA0, BA1
A10
CKE
CLK
DQ
Precharge all
High-Z
t CKS
active banks
t CMS
t AS
SINGLE BANK
ALL BANKS
PRECHARGE
BANK(S)
T0
t AH
t CKH
t CMH
t CK
MIN
2.5
10
1
3
3
8
-8
MAX
t RP
T1
NOP
MIN
2.5
10
12
1
3
3
-10
AUTO REFRESH MODE
MAX
T2
REFRESH
AUTO
UNITS
t CH
ns
ns
ns
ns
ns
ns
t RFC
44
NOP
(
(
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(
)
(
)
(
)
(
)
(
(
(
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(
(
(
)
(
)
(
(
)
)
SYMBOL*
t
t
t
t
t
t
t
)
)
)
RP
CK (1)
CKH
CKS
CMH
CMS
RFC
NOP
t CL
Micron Technology, Inc., reserves the right to change products or specifications without notice.
1
Tn + 1
REFRESH
AUTO
t
RFC
MIN
NOP
2.5
2.5
20
80
20
1
1
MOBILE SDRAM
(
(
(
(
(
)
(
(
(
(
)
(
)
(
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(
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-8
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NOP
MAX
©2003 Micron Technology, Inc. All rights reserved.
256Mb: x16
PRELIMINARY
MIN
100
2.5
2.5
25
20
1
1
To + 1
ACTIVE
ROW
ROW
-10
BANK
DON’T CARE
MAX
UNITS
ns
ns
ns
ns
ns
ns
ns
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