MT48LC16M16LFFG Micron Technology Inc, MT48LC16M16LFFG Datasheet - Page 42

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MT48LC16M16LFFG

Manufacturer Part Number
MT48LC16M16LFFG
Description
Manufacturer
Micron Technology Inc
Datasheet

Specifications of MT48LC16M16LFFG

Lead Free Status / Rohs Status
Not Compliant
256Mb: x16 Mobile SDRAM
MobileRamY26L_B.p65 – Pub. 04/03
NOTE: 1. Violating refresh requirements during power-down may result in a loss of data.
TIMING PARAMETERS
*CAS latency indicated in parentheses.
SYMBOL*
t
t
t
t
t
t
AH
AS
CH
CL
CK (3)
CK (2)
A0-A9, A11, A12
DQML, DQMU
COMMAND
Precharge all
BA0, BA1
active banks
DQM/
CKE
CLK
A10
DQ
High-Z
t CMS
t CKS
t AS
SINGLE BANK
PRECHARGE
ALL BANKS
BANK(S)
T0
t CMH
t CKH
t AH
MIN
2.5
10
1
3
3
8
-8
Two clock cycles
All banks idle, enter
power-down mode
MAX
t CK
T1
NOP
MIN
2.5
10
12
1
3
3
-10
POWER-DOWN MODE
t CKS
MAX
t CL
T2
NOP
UNITS
Input buffers gated off while in
power-down mode
t CH
ns
ns
ns
ns
ns
ns
42
Exit power-down mode
SYMBOL*
t
t
t
t
t
CK (1)
CKH
CKS
CMH
CMS
(
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Micron Technology, Inc., reserves the right to change products or specifications without notice.
1
(
(
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t CKS
MIN
Tn + 1
2.5
2.5
20
1
1
NOP
All banks idle
MOBILE SDRAM
-8
©2003 Micron Technology, Inc. All rights reserved.
MAX
256Mb: x16
PRELIMINARY
MIN
Tn + 2
2.5
2.5
25
ACTIVE
1
1
ROW
ROW
BANK
-10
DON’T CARE
MAX
UNITS
ns
ns
ns
ns
ns

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