PNX1701EH,557 NXP Semiconductors, PNX1701EH,557 Datasheet - Page 561

PNX1701EH,557

Manufacturer Part Number
PNX1701EH,557
Description
Manufacturer
NXP Semiconductors
Datasheet

Specifications of PNX1701EH,557

Operating Temperature (min)
0C
Operating Temperature Classification
Commercial
Mounting
Surface Mount
Lead Free Status / Rohs Status
Not Compliant
1. Introduction
2. Functional Description
1.1 Features
2.1 SPDIF Input Block Level Diagram
The SPDIF input block accepts digital serial input that complies with the IEC60958
format specification for audio bitstreams. The interface locks onto and decodes the
incoming “biphase-mark” encoded signal and recognize all preambles associated
with the IEC60958 audio format.
Key functions include:
The SPDIF high level block diagram is presented in
input samples the input bitstream at a much higher clock rate than the input source
bitrate. During this process, the SPDIF bitclock and data are recovered. This sampled
“synchronous” audio stream is then passed to an SPDIF decoder function. Internally,
the SPDIF decoder produces a decoded binary representation of the ‘bi-phase’ data
stream. At its output, the decoder produces a framed audio data format with separate
framing, data and clock signals. This framed audio data is fed to the DMA unit for
Chapter 18: SPDIF Input
PNX17xx Series Data Book – Volume 1 of 1
Rev. 1 — 17 March 2006
Clock extraction and decode of incoming “biphase-mark” encoded serial
bitstream
Recognition of all preamble types: B, M, W
Support for 17- to 24-bit PCM coded or non-PCM coded data types
DMA of incoming audio samples into memory
Raw mode 32-bit capture of incoming sub-frames
Interrupt on parity or validity error as well as others
Internal loopback with SPDIF out - Diagnostic mode
Support for IEC61937 non-PCM bitstreams format
Capture of channel status and user information to MMIO registers
Figure
Preliminary data sheet
1. The SPDIF receiver

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