PNX1701EH,557 NXP Semiconductors, PNX1701EH,557 Datasheet - Page 209
PNX1701EH,557
Manufacturer Part Number
PNX1701EH,557
Description
Manufacturer
NXP Semiconductors
Datasheet
1.PNX1701EH557.pdf
(832 pages)
Specifications of PNX1701EH,557
Operating Temperature (min)
0C
Operating Temperature Classification
Commercial
Mounting
Surface Mount
Lead Free Status / Rohs Status
Not Compliant
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Philips Semiconductors
Volume 1 of 1
PNX17XX_SER_1
Preliminary data sheet
Figure 1:
Boot Block Diagram
2.2.1 MMIO Bus Interface
2.2.2 I
2.2 Boot Module Operation
DCS Bus
The following presents a high level block diagram of the boot module.
The four main components of the boot module are:
The MMIO bus sub-module contains only the master interface. Therefore despite the
general rule there is no MODULE_ID for the boot module and the master interface
module can only perform writes. It does not perform reads from other modules sitting
on the DCS bus. As a master, this module writes full 32-bit words to the DCS bus.
These write requests are then routed to the appropriate MMIO register or to the MMI.
Depending on the state of the BOOTMODE[1:0] pins, the I
activated after the reset is released. If the BOOTMODE[1:0] is equal to 0x3 then the
boot module takes over the control of the I
external EEPROM is decoded by the boot state machine. The MMIO bus sub-module
is activated to write data on the DCS bus per the command encoding described in
Section
there will be no other bus masters during the boot process. However, the I
does allow clock stretching by the slave (here the EEPROM). The clock stretching is
not expected from the EEPROM but the feature is there in order to meet the I
2
1. The MMIO to the DCS bus interface.
2. The I
3. The Boot Control & State Machine.
4. The Internal Scripts (detailed in
C Master
Boot Module
27 MHz
(clk_27)
MMIO to DCS
Bus Interface
2.3. The I
2
C Master Interface & Control.
2
C master does not arbitrate for the I
Rev. 1 — 17 March 2006
Internal
Boot
Script
peri_rst_n
I
2
#1
RESET Module
C Control
#2
PNX17xx
Section
2
C interface. The data received from the
3.)
I
2
8
2
C
BOOT_MODE[7:0]
2
© Koninklijke Philips Electronics N.V. 2006. All rights reserved.
Optional 2 to
64 Kilobytes
EEPROM
with custom
C bus since it is expected that
PNX17xx Series
2
C master interface gets
Chapter 6: Boot Module
2
C master
2
C
6-4
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