PNX1701EH,557 NXP Semiconductors, PNX1701EH,557 Datasheet - Page 214
PNX1701EH,557
Manufacturer Part Number
PNX1701EH,557
Description
Manufacturer
NXP Semiconductors
Datasheet
1.PNX1701EH557.pdf
(832 pages)
Specifications of PNX1701EH,557
Operating Temperature (min)
0C
Operating Temperature Classification
Commercial
Mounting
Surface Mount
Lead Free Status / Rohs Status
Not Compliant
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Philips Semiconductors
Volume 1 of 1
Table 6:
PNX17XX_SER_1
Preliminary data sheet
CAS_LATENCY = 3.0
0x1be4_7101
0x0000_0002
0x0000_0003
0x0000_0003
0x1be4_712c
0x0000_0003
0x1be4_710c
0x0000_0003
0x1be6_5004
0x0000_0003
0x1be6_50C0
0x0000_000B
0x1be6_50C4
0x0000_0008
0x1be6_5088
0x0000_0008
0x1be6_5080
0x0000_0133
0x1be6_5128
0x0000_0006
0x1be6_512c
0x0000_0760
0x1be6_5000
0x0000_0001
0x1be6_5100
0x0004_0004
0x1be6_511c
0x0000_0004
0x1be6_5124
0x0000_0004
0x1be4_0010
0x71D60F03 (for FLASH boot)
0x01D60F03 (for HOST boot)
0x1be4_0044
0x0000_0006
<Standalone or Host-assisted Specifics>
0x0000_0006
Binary Sequence for the Common Boot Script
3.1.1 Binary Sequence for the Common Boot Script
CAS_LATENCY = 2.5
0x0000_000a
0x0000_0163
0x0000_0005
0x0000_000d
Rev. 1 — 17 March 2006
Comments
TM5250 Clock
MMI Clock
MMIO Clock
PCI_SYS_CLK Clock
MMI DEF_BANK_SWITCH
MMI ROW_WIDTH
MMI COLUMN_WIDTH
MMI PRECHARGE_BIT: BOOT_MODE[3]
MMI MR
MMI TCAS
MMI RF_PERIOD
MMI CTL
MMI TRCD
MMI TRRD
MMI TMRD
The value of PCI_SETUP depends on the
BOOT_MODE[7:4] pins. In this example:
PCI Command Register
Section 3.2
Terminate boot
• 0x8 for x32 devices, and CAS latency 3.0
• 0xa for x16 devices, and CAS latency 2.5
• 128 MB DRAM aperture
• Internal PCI arbiter enabled
or
© Koninklijke Philips Electronics N.V. 2006. All rights reserved.
Section 3.3
PNX17xx Series
Chapter 6: Boot Module
6-9
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