PNX1701EH,557 NXP Semiconductors, PNX1701EH,557 Datasheet - Page 494
PNX1701EH,557
Manufacturer Part Number
PNX1701EH,557
Description
Manufacturer
NXP Semiconductors
Datasheet
1.PNX1701EH557.pdf
(832 pages)
Specifications of PNX1701EH,557
Operating Temperature (min)
0C
Operating Temperature Classification
Commercial
Mounting
Surface Mount
Lead Free Status / Rohs Status
Not Compliant
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Philips Semiconductors
Volume 1 of 1
PNX17XX_SER_1
Preliminary data sheet
Figure 3:
8-bit data input to FGPI
1
a
Input data width not equal to sample size setting
a+4
2
FGPI_CTL.SAMPLE_SIZE = 32-bit
a+8
2.2 Base Addresses
2.3 Sample (data) Size
2.4 Record or Message Size
3
Remark: SOFTWARE_RESET does not reset MMIO bus interface registers. Any
DMA transfers will be aborted during a SOFTWARE_RESET. All registers are reset to
the Reset Value shown in the Register Description section.
Two base address registers are used to point to main memory buffers in a double
buffering scheme. Addresses are forced into 32-bit address alignment.
Data size (width) per sample is set to either 8, 16, or 32 bits using
FGPI_CTL.SAMPLE_SIZE bit field. For 8-bit samples, four samples are packed into
one 32-bit word. For 16-bit samples, two samples are packed 2 into one 32-bit word.
Byte order, with which the data is written to memory, is controlled by the global
PNX17xx Series endian mode. The endian state only affects 16 and 32-bit sample
sizes.
Figure 3
match the setting of the FGPI_CTL.SAMPLE_SIZE bit field. Settings for the PNX17xx
Series Input Router will affect the “unknown data” received.
In record mode:
In message mode:
a+12
4
The number of samples per record is set by FGPI_REC_SIZE field. This is the
amount of samples that will be captured after each record start event.
Maximum number of samples per message is set by FGPI_REC_SIZE field. The
end of a message is signaled by the active fgpi_stop edge. If the message length
is greater than the programmed value in the FGPI_REC_SIZE register, the
message is truncated and a OVERFLOW interrupt is generated.
bit 31
bit 0
shows how data is stored in memory if data input to the FGPI does not
16-bit data input
1
a
Rev. 1 — 17 March 2006
a+4
2
Chapter 14: FGPI: Fast General Purpose Interface
FGPI_CTL.SAMPLE_SIZE = 16-bit
8-bit data input to FGPI
2
1
a
a+4
3
4
© Koninklijke Philips Electronics N.V. 2006. All rights reserved.
PNX17xx Series
memory address
unknown
data
14-7
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