TXC-05802AIPQ Transwitch Corporation, TXC-05802AIPQ Datasheet - Page 40

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TXC-05802AIPQ

Manufacturer Part Number
TXC-05802AIPQ
Description
Manufacturer
Transwitch Corporation
Datasheet

Specifications of TXC-05802AIPQ

Operating Supply Voltage (typ)
3.3/5V
Operating Temperature Classification
Industrial
Package Type
PQFP
Mounting
Surface Mount
Pin Count
208
Lead Free Status / Rohs Status
Not Compliant
MEMORY MAP RESET STATES
The general conditions for resetting the memory map states are:
There are two alternative reset conditions that reset the memory map registers 04H through FFH to the values
shown in the following table:
1. all input clock signals are present, and
2. the DEVHIZ and TSTMODE input pins are high.
1. power-up, or
2. hardware reset applied via the RESET input pin.
Address (Hex)
Reset Value (Hex)
Notes:
1. Reset value depends on content of location 00H in TRAM.
2. Reset value depends on state of pins ABRENA, U32, ENARB and UA(4-0).
3. Undefined value after power-up. Pre-existing value is not affected by hardware reset.
4. Except reserved addresses, which contain undefined values after power-up and hardware reset.
5. It is recommended to provide the control processor an independent means of forcing an external hard-
ware reset. In order to insure proper device initialization, after the loss of either the CellBus Bus Write
Clock or the CellBus Bus Read Clock, an external hardware reset must be applied via the RESET pin.
The hardware reset must be applied in the presence of all input clock signals.
0A
40
XX
17
(1)
- 40 -
XX
1E
(2)
60 - 93,
A0-D7
XX
(3)
E0 - FF
XX
(3)
Ed. 3, November 1999
Others
00
TXC-05802
CUBIT- Pro
TXC-05802-MB
(4)

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