ISP1564HLUM STEricsson, ISP1564HLUM Datasheet - Page 71

• Manufacturer Part Number: ISP1564HLUM
• Manufacturer: STEricsson

Specifications of ISP1564HLUM

• Operating Supply Voltage (typ): 3.3V
• Operating Supply Voltage (min): 3V
• Operating Supply Voltage (max): 3.6V
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 100
• Lead Free Status / Rohs Status: Compliant

NXP Semiconductors
Table 105. FRINDEX - Frame Index register bit allocation
Address: Content of the base address register + 2Ch
[1]
Table 106. FRINDEX - Frame Index register bit description
Address: Content of the base address register + 2Ch
ISP1564_1
Product data sheet
Bit
Symbol
Reset
Access
Bit
Symbol
Reset
Access
Bit
Symbol
Reset
Access
Bit
Symbol
Reset
Access
Bit
31 to 14
13 to 0
The reserved bits must always be written with the reset value.
Symbol
reserved
FRINDEX [13:0]
11.3.5 PERIODICLISTBASE register
R/W
R/W
R/W
R/W
31
23
15
0
0
0
7
0
reserved
Table 107. N based value of FLS[1:0]
The Periodic Frame List Base Address (PERIODICLISTBASE) register contains the
beginning address of the periodic frame list in the system memory. If the Host Controller is
in 64-bit mode, as indicated by logic 1 in 64AC (bit 0 of the HCCPARAMS register), the
most significant 32 bits of every control data structure address comes from the
CTRLDSSEGMENT register. For details on the CTRLDSSEGMENT register, refer to
Enhanced Host Controller Interface Specification for Universal Serial Bus Rev. 1.0 . The
FLS[1:0]
00b
01b
10b
11b
[1]
R/W
R/W
R/W
R/W
Description
-
Frame Index: Bits in this register are used for the frame number in the SOF packet and as
the index into the frame list. The value in this register increments at the end of each time
frame. For example, microframe. The bits used for the frame number in the SOF token are
taken from bits 13 to 3 of this register. Bits N to 3 are used for the frame list current index.
This means that each location of the frame list is accessed eight times, frames or
microframes, before moving to the next index.
Table 107
30
22
14
0
0
0
6
0
illustrates N based on the value of FLS[1:0] (bits 3 to 2 in the USBCMD register).
R/W
R/W
R/W
R/W
29
21
13
0
0
0
5
0
Rev. 01 — 4 December 2006
Number elements
1024
512
256
reserved
R/W
R/W
R/W
R/W
28
20
12
0
0
0
4
0
FRINDEX[7:0]
reserved
reserved
[1]
[1]
R/W
R/W
R/W
R/W
27
19
11
FRINDEX[13:8]
0
0
0
3
0
R/W
R/W
R/W
R/W
26
18
10
0
0
0
2
0
HS USB PCI Host Controller
N
12
11
10
-
R/W
R/W
R/W
R/W
25
17
0
0
9
0
1
0
© NXP B.V. 2006. All rights reserved.
ISP1564
R/W
R/W
R/W
R/W
24
16
0
0
8
0
0
0
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