ISP1564HLUM STEricsson, ISP1564HLUM Datasheet - Page 58

• Manufacturer Part Number: ISP1564HLUM
• Manufacturer: STEricsson

Specifications of ISP1564HLUM

• Operating Supply Voltage (typ): 3.3V
• Operating Supply Voltage (min): 3V
• Operating Supply Voltage (max): 3.6V
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 100
• Lead Free Status / Rohs Status: Compliant

NXP Semiconductors
[1]
Table 90.
Address: Content of the base address register + 50h
ISP1564_1
Product data sheet
Bit
Symbol
Reset
Access
Bit
Symbol
Reset
Access
Bit
Symbol
Reset
Access
Bit
31
30 to 18 reserved
17
16
15
The reserved bits must always be written with the reset value.
Symbol
CRWE
CCIC
LPSC
DRWE
HcRhStatus - Host Controller Root Hub Status register bit description
DRWE
R/W
R/W
R/W
23
15
0
0
7
0
Description
On write Clear Remote Wake-up Enable:
0 — No effect
1 — Clears DRWE (Device Remote Wake-up Enable)
-
Overcurrent Indicator Change: This bit is set by hardware when a change has occurred to the OCI
bit of this register.
0 — No effect
1 — The HCD clears this bit.
On read Local Power Status Change: The root hub does not support the local power status feature.
Therefore, this bit is always logic 0.
On write Set Global Power: In global power mode (Power Switching Mode = 0), logic 1 is written to
this bit to turn on power to all ports (clear Port Power Status). In per-port power mode, it sets Port
Power Status only on ports whose Port Power Control Mask bit is not set. Writing logic 0 has no
effect.
On read Device Remote Wake-up Enable: This bit enables bit Connect Status Change (CSC) as a
resume event, causing a state transition from USBSUSPEND to USBRESUME and setting the
Resume Detected interrupt.
0 — CSC is not a remote wake-up event.
1 — CSC is a remote wake-up event.
On write Set Remote Wake-up Enable: Writing logic 1 sets DRWE (Device Remote Wake-up
Enable). Writing logic 0 has no effect.
R/W
R/W
R/W
22
14
0
0
6
0
R/W
R/W
R/W
21
13
0
0
5
0
Rev. 01 — 4 December 2006
reserved
reserved
[1]
[1]
R/W
R/W
R/W
20
12
0
0
4
0
reserved
R/W
R/W
R/W
19
11
0
0
3
0
[1]
R/W
R/W
R/W
18
10
0
0
2
0
HS USB PCI Host Controller
CCIC
R/W
R/W
OCI
17
R
0
9
0
1
0
© NXP B.V. 2006. All rights reserved.
ISP1564
LPSC
R/W
R/W
LPS
RW
16
0
8
0
0
0
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