PNX1302EH NXP Semiconductors, PNX1302EH Datasheet - Page 33

• Manufacturer Part Number: PNX1302EH
• Manufacturer: NXP Semiconductors

Specifications of PNX1302EH

• Lead Free Status / RoHS Status: Not Compliant

Philips Semiconductors
AO_OSCLK
AO_SCK
AO_SD1
AO_SD2
AO_SD3
AO_SD4
AO_WS
SPDO
SSI_CLK
SSI_RXFSX
SSI_RXDATA
SSI_TXDATA
SSI_IO1
SSI_IO2
Pin Name
BGA
Ball
B14
A14
B13
A13
C12
B12
A15
A12
A10
B10
B11
A11
A9
B9
Audio Out (always acts as sender, but can be master or slave for D/A timing)
WEAK5
WEAK5
WEAK5
WEAK5
WEAK5
WEAK5
WEAK5
WEAK5
WEAK5
WEAK5
WEAK5
STRG3
STRG5
STRG3
Type
Pad
Synchronous Serial Interface (SSI) to an off-chip modem front-end
Mode
OUT
OUT
OUT
OUT
OUT
OUT
OUT
I/O
I/O
I/O
I/O
IN
IN
IN
Over sampling clock. This output can be programmed to emit any frequency up to 40
MHz, with a sub-Hertz resolution. It is intended for use as the 256 or 384f
pling clock by the external D/A conversion subsystem. A board level 27-33 ohm series
resistor is recommended to reduce ringing.
• When the Audio Out (AO) unit is programmed to act as the serial interface timing
• When the AO unit is programmed to act as serial interface timing master, AO_SCK
AO_SCK is limited to 22 MHz. The sample rate of valid samples embedded within the
serial stream is variable. If used as output, a board level 27-33 ohm series resistor is
recommended to reduce ringing.
Serial data to external stereo audio D/A subsystem for first 2 of 8 channels. The timing
of transitions on this output is determined by the CLOCK_EDGE bit in the AO_SERIAL
register, and can be on positive or negative AO_SCK edges.
Serial data.
Serial data.
Serial data.
• When the AO unit is programmed as the serial-interface timing slave (power-up
• When the AO unit is programmed as serial-interface timing master, AO_WS acts as
AO_WS is the word-select or frame-synchronization signal from/to the external D/A
subsystem. Each audio channel receives 1 sample for every WS period.
Self clocking serial data stream as per IEC958, with 1937 extensions. Note that the
low impedance output buffer requires a 27 to 33 ohm series terminator close to
PNX1300/01/02/11 in order to match the board trace impedance. This series termina-
tor can be/must be part of the voltage divider needed to create the coaxial output
through the AC isolation transformer.
Clock signal of the synchronous serial interface to an off-chip modem analog frontend
or ISDN terminal adapter; provided by the receive channel of an external communica-
tion device.
Receive frame sync reference of the synchronous serial interface, provided by the
receive channel of an external communication device.
Receive serial data input; provided by the receive channel of an external communica-
tion device.
Transmit serial data output; sent to the transmit channel of the external communica-
tion device.
General purpose programmable I/O. Set to input on power up.
General purpose programmable I/O. Set to input on power up. Can also be pro-
grammed to function as the transmit channel frame synchronization reference output.
slave (power up default), AO_SCK acts as input. It receives the Serial Clock from
the external audio D/A subsystem. The clock is treated as fully asynchronous to the
PNX1300/01/02/11 main clock.
acts as output. It drives the serial clock for the external audio D/A subsystem. The
clock frequency is a programmable integral divisor of the AO_OSCLK frequency.
default), AO_WS acts as an input. AO_WS is sampled on the opposite AO_SCK
edge at which AO_SDx are asserted.
an output. AO_WS is asserted on the same AO_SCK edge as AO_SDx.
S/PDIF Output (Output)
PRELIMINARY SPECIFICATION
Description
s
over sam-
Pin List
1-7