MT28C6428P20FM-80 TET Micron Technology Inc, MT28C6428P20FM-80 TET Datasheet - Page 42

• Manufacturer Part Number: MT28C6428P20FM-80 TET
• Manufacturer: Micron Technology Inc

Specifications of MT28C6428P20FM-80 TET

• Operating Temperature (max): 85C
• Mounting: Surface Mount
• Lead Free Status / RoHS Status: Not Compliant

SRAM OPERATING MODES
SRAM READ ARRAY
S_CE1#, S_CE2, S_WE#, S_OE#, S_UB#, and S_LB#, as
indicated in the Truth Table. To perform an SRAM
READ operation, S_CE1#, and S_OE#, must be at V
and S_CE2 and S_WE# must be at V
state, S_UB# and S_LB# control whether the lower byte
is read (S_UB# V
(S_UB# V
read (S_UB# V
V
rent consumption may be reduced by reading within a
16-word page. This is done by holding S_CE1# and
4 Meg x 16 Asynchronous/Page Flash 512K x 16 SRAM Combo Memory
MT28C6428P20_4.p65 – Rev. 4, Pub. 10/02
IH
The operational state of the SRAM is determined by
, S_LB# V
While performing an SRAM READ operation, cur-
IL
, S_LB# V
IH
) and the device is in a standby state.
IL
, S_LB# V
IH
, S_LB# V
IH
), both upper and lower bytes are
A4–A18
S_CE1#
A0–A3
S_WE#
IL
S_OE#
S_UB#
S_CE2
S_LB#
), or neither are read (S_UB#
IL
), the upper byte is read
SRAM FUNCTIONAL BLOCK DIAGRAM
CONTROL
ADDRESS
ADDRESS
DECODE
DECODE
WORD
LOGIC
LOGIC
LOGIC
PAGE
IH
. When in this
4 MEG x 16 ASYNCHRONOUS/PAGE FLASH
RAM ARRAY
x16 WORD
16K-PAGE
x16 BIT
IL
,
42
512K x 16 SRAM COMBO MEMORY
WORD
S_OE# at V
addresses A0–A3. S_UB# and S_LB# control the data
width as described above.
SRAM WRITE ARRAY
S_CE1# and S_WE# must be at V
S_OE# must be at V
S_LB# control whether the lower byte is written (S_UB#
V
S_LB# V
(S_UB# V
V
MUX
IH
IH
, S_LB# V
, S_LB# V
In order to perform an SRAM WRITE operation,
IH
IL
Micron Technology, Inc., reserves the right to change products or specifications without notice.
BUFFERS
OUTPUT
), both upper and lower bytes are written
INPUT/
, S_LB# V
MUX
AND
IL
IH
IL
, S_WE# and S_CE2 at V
), the upper byte is written (S_UB# V
) and the device is in a standby state.
IH
IL
. When in this state, S_UB# and
), or neither are written (S_UB#
DQ8–DQ15
DQ0–DQ7
IL
, and S_CE2 and
IH
©2002, Micron Technology, Inc.
, and toggling
IL
,