MT28C6428P20FM-80 TET Micron Technology Inc, MT28C6428P20FM-80 TET Datasheet - Page 24

• Manufacturer Part Number: MT28C6428P20FM-80 TET
• Manufacturer: Micron Technology Inc

Specifications of MT28C6428P20FM-80 TET

• Operating Temperature (max): 85C
• Mounting: Surface Mount
• Lead Free Status / RoHS Status: Not Compliant

NOTE: 1. Full status register check can be done after each block or after a sequence of blocks.
4 Meg x 16 Asynchronous/Page Flash 512K x 16 SRAM Combo Memory
MT28C6428P20_4.p65 – Rev. 4, Pub. 10/02
FULL STATUS REGISTER CHECK FLOW
2. SR3 must be cleared before attempting additional PROGRAM/ERASE operations.
3. SR5 is cleared only by the CLEAR STATUS REGISTER command in cases where multiple blocks are erased before full
CONFIRM Command
BLOCK ERASE Passed
Read Status Register
Read Status Register
Issue BLOCK ERASE
Full Status Register
Issue ERASE SETUP
and Block Address
Check (optional)
Command and
status is checked.
Block Address
BLOCK ERASE
BLOCK ERASE Flowchart
Completed
SR 7 = 1?
SR1 = 0?
SR3 = 0?
SR5 = 0?
Start
Bits
Bits
YES
YES
YES
YES
1
Figure 7
NO
NO
NO
NO
BLOCK ERASE Failed
ERASE Attempted
on a Locked Block
V
PP
SUSPEND?
NO
ERASE
Range Error
SUSPEND Loop
YES
ERASE
4 MEG x 16 ASYNCHRONOUS/PAGE FLASH
24
512K x 16 SRAM COMBO MEMORY
BUS
OPERATION COMMAND COMMENTS
BUS
OPERATION COMMAND COMMENTS
Standby
Standby
Standby
Standby
WRITE
WRITE
READ
Standby
Repeat for subsequent blocks.
Write FFh after the last BLOCK ERASE operation to
reset the device to read array mode.
Micron Technology, Inc., reserves the right to change products or specifications without notice.
WRITE
ERASE
SETUP
ERASE
Data = 20h
Block Addr = Address
within block to be erased
Data = D0h
Block Addr = Address
within block to be erased
Status register data;
toggle OE# or CE# to
update status register.
Check SR7
1 = Ready, 0 = Busy
Check SR1
1 = Detect locked block
Check SR3
1 = Detect F_V
Check SR4 and SR5
1 = BLOCK ERASE
Check SR5
1 = BLOCK ERASE error
command error
2
3
©2002, Micron Technology, Inc.
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