MT28C6428P20FM-80 TET Micron Technology Inc, MT28C6428P20FM-80 TET Datasheet - Page 41

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MT28C6428P20FM-80 TET

Manufacturer Part Number
MT28C6428P20FM-80 TET
Description
Manufacturer
Micron Technology Inc
Datasheet

Specifications of MT28C6428P20FM-80 TET

Operating Temperature (max)
85C
Mounting
Surface Mount
Lead Free Status / RoHS Status
Not Compliant
4 Meg x 16 Asynchronous/Page Flash 512K x 16 SRAM Combo Memory
MT28C6428P20_4.p65 – Rev. 4, Pub. 10/02
OFFSET
4A, 4B
39, 3A
37, 38
43, 44
48, 49
3D
4D
3B
3C
3E
3F
40
41
42
45
46
47
4C
4E
4F
0020, 0000
0000, 0001
0050, 0052
0080, 0000
0003, 0003
0003,0000
DATA
00C0
0049
0030
0031
00E6
0002
0000
0000
0001
0018
0001
0003
0000
0002
0008
Top boot block device……64KB
Bottom boot block device……64KB
“PR”
“I”
Major version number, ASCII
Minor version number, ASCII
Optional Feature and Command Support
Bit 0 Chip erase supported no = 0
Bit 1 Suspend erase supported = yes = 1
Bit 2 Suspend program supported = yes = 1
Bit 3 Chip lock/unlock supported = no = 0
Bit 4 Queued erase supported = no = 0
Bit 5 Instant individual block locking supported = yes = 1
Bit 6 Protection bits supported = yes = 1
Bit 7 Page mode read supported = yes = 1
Bit 8 Synchronous read supported = yes = 1
Bit 9 Simultaneous operation supported = yes = 1
Program supported after erase suspend = yes
Bit 0 block lock status active = yes; Bit 1 block lock down active = yes
F_V
F_V
Number of protection register fields in JEDEC ID space
Lock bytes LOW address, lock bytes HIGH address
2
Background Operation
0000 = Not used
0001 = 4% block split
0002 = 12% block split
0003 = 25% block split
0004 = 50% block split
Burst Mode Type
0000 = No burst mode
00x1 = 4 words MAX
00x2 = 8 words MAX
00x3 = 16 words MAX
001x = Linear burst, and/or
002x = Interleaved burst, and/or
004x = Continuous burst
Page Mode Type
0000 = No page mode
0001 = 4-word page
0002 = 8-word page
0003 = 16-word page
0004 = 32-word page
SRAM density, 8Mb (512K x 16)
n
factory programmed bytes, 2
CC
PP
supply optimum; Bit7–Bit4 Volts in Hex; Bit3–Bit0 100mV in BCD
supply optimum; Bit7–Bit4 Volts in BCD; Bit3–Bit0 100mV in BCD
4 MEG x 16 ASYNCHRONOUS/PAGE FLASH
CFI (continued)
Table 12
41
512K x 16 SRAM COMBO MEMORY
n
user programmable bytes
DESCRIPTION
Micron Technology, Inc., reserves the right to change products or specifications without notice.
©2002, Micron Technology, Inc.

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