WJLXT385LE.B1 Cortina Systems Inc, WJLXT385LE.B1 Datasheet - Page 68

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WJLXT385LE.B1

Manufacturer Part Number
WJLXT385LE.B1
Description
Manufacturer
Cortina Systems Inc
Datasheet

Specifications of WJLXT385LE.B1

Lead Free Status / RoHS Status
Supplier Unconfirmed
6.7.2
68
Intel
Figure 9. Intel
®
LXT385 Octal E1 S/H PCM Transceiver with JA
Digital Loopback
The digital loopback function is available in the Host Processor mode only.
AsFigure 9
inputs TPOS and TNEG are looped back and are output on the RCLK, RPOS, and RNEG pins. The
data on TPOS and TNEG is also output on the TTIP and TRING pins. (To select digital loopback,
see
When the LXT385 ransceiver is in a digital loopback, it ignores input signals on RTIP and RRING.
* If decoder is enabled, either HDB3 or AMI can be selected.
** Either a transmitter or a receiver can be enabled for use with the jitter attenuator, but not both.
Table 37
®
LXT385 Transceiver Digital Loopback
RPOS
RNEG
TPOS
TNEG
RCLK
TCLK
shows, when digital loopback is selected, the transmit clock TCLK and transmit data
in
Chapter 8.0,
“Registers”.)
JA**
JA**
Recovery
Control
Timing
Timing
and
TTIP
TRING
RTIP
RRING
Revision Date: 19-Jan-2006
Document Number: 249252
Revision Number: 006

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