WJLXT385LE.B1 Cortina Systems Inc, WJLXT385LE.B1 Datasheet - Page 56

• Manufacturer Part Number: WJLXT385LE.B1
• Manufacturer: Cortina Systems Inc

Specifications of WJLXT385LE.B1

• Lead Free Status / RoHS Status: Supplier Unconfirmed

6.3.7
56
Intel
®
LXT385 Octal E1 S/H PCM Transceiver with JA
To prevent inadvertent interrupts during programming, before setting or resetting RAISEN, mask
the AIS interrupt enable bit for the corresponding receiver. (See
Register, AISIE - 14h” on page
Receiver In-Service Line-Code-Violation Monitoring
Receiver in-service line-code-violation monitoring occurs only with unipolar I/O (that is, when
TNEG/UBS is connected high for more than 16 consecutive MCLK cycles). In this case, when the
LXT385 ransceiver is receiving a line input signal and an in-service line-code violation occurs,
how this violation is reported depends on the type of decoder selected.
If the LOS Detector circuit (see
service line-code violation and theLXT385 ransceiver decoder type is:
•
•
AMI, all bipolar violations (two consecutive pulses with the same polarity) are reported at the
BPV output.
HDB3, the following occurs:
— First, the LXT385 ransceiver asserts the BPV pin high for one RCLK period for every
— Next, the RDATA pin acts as the receive data output. (For details on the BPV and RDATA
bipolar violation that is not part of the zero-code substitution rules.
pin functions, see
Section 5.3, “Framer/Mapper
89)
Section 6.3.3, “Receiver Loss-Of-Signal
Signals”.)
Table 45, “AIS Interrupt Enable
Detector”) detects an in-
Revision Date: 19-Jan-2006
Document Number: 249252
Revision Number: 006