WJLXT385LE.B1 Cortina Systems Inc, WJLXT385LE.B1 Datasheet - Page 116

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WJLXT385LE.B1

Manufacturer Part Number
WJLXT385LE.B1
Description
Manufacturer
Cortina Systems Inc
Datasheet

Specifications of WJLXT385LE.B1

Lead Free Status / RoHS Status
Supplier Unconfirmed
116
Intel
Figure 24. Intel
AD7-AD0
®
LXT385 Octal E1 S/H PCM Transceiver with JA
RDY
WR
ALE
CS
INT
Figure 24
multiplexed interface, and a write cycle takes place.
Tristate
®
Processor Multiplexed Interface - Write Timing
is a timing diagram for the Intel
tSALW
tVL
ADDRESS
tDRDY
tHALW
tSLW
tSCSW
®
processor in the Host Processor mode, with a
tVRDY
tVWR
WRITE DATA
tDRDY
tSDW
tHCSW
tINT
Revision Date: 19-Jan-2006
Document Number: 249252
tHDW
Revision Number: 006
Tristate
tDRDYZ

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