LAN9312-NU Standard Microsystems (SMSC), LAN9312-NU Datasheet - Page 452
![no-image](/images/manufacturer_photos/0/6/632/standard_microsystems__smsc__sml.jpg)
LAN9312-NU
Manufacturer Part Number
LAN9312-NU
Description
Manufacturer
Standard Microsystems (SMSC)
Datasheet
1.LAN9312-NU.pdf
(458 pages)
Specifications of LAN9312-NU
Number Of Primary Switch Ports
2
Operating Supply Voltage (typ)
3.3V
Fiber Support
No
Phy/transceiver Interface
MII
Power Supply Type
Analog
Data Rate (typ)
10/100Mbps
Vlan Support
Yes
Operating Temperature (max)
70C
Operating Temperature (min)
0C
Pin Count
128
Mounting
Surface Mount
Jtag Support
No
Operating Supply Voltage (max)
3.6V
Operating Supply Voltage (min)
3V
Operating Temperature Classification
Commercial
Data Rate
100Mbps
Lead Free Status / RoHS Status
Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
LAN9312-NU
Manufacturer:
Microchip Technology
Quantity:
10 000
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Revision 1.7 (06-29-10)
15.6
Crystal Cut
Crystal Oscillation Mode
Crystal Calibration Mode
Frequency
Frequency Tolerance @ 25
Frequency Stability Over Temp
Frequency Deviation Over Time
Total Allowable PPM Budget
Shunt Capacitance
Load Capacitance
Drive Level
Equivalent Series Resistance
Operating Temperature Range
n/a XI Pin Capacitance
n/a XO Pin Capacitance
PARAMETER
The LAN9312 can accept either a 25MHz crystal (preferred) or a 25MHz single-ended clock oscillator
(+/- 50ppm) input. If the single-ended clock oscillator method is implemented, XO should be left
unconnected and XI should be driven with a nominal 0-3.3V clock signal. The input clock duty cycle
is 40% minimum, 50% typical and 60% maximum.
It is recommended that a crystal utilizing matching parallel load capacitors be used for the crystal
input/output signals (XI/XO). See
Note 15.11 The maximum allowable values for Frequency Tolerance and Frequency Stability are
Note 15.12 Frequency Deviation Over Time is also referred to as Aging.
Note 15.13 The total deviation for the Transmitter Clock Frequency is specified by IEEE 802.3 as
Note 15.14 This number includes the pad, the bond wire and the lead frame. PCB capacitance is not
Clock Circuit
application dependant. Since any particular application must meet the IEEE +/-50 PPM
Total PPM Budget, the combination of these two values must be approximately +/-45 PPM
(allowing for aging).
+/- 50 PPM.
included in this value. The XO/XI pin and PCB capacitance values are required to
accurately calculate the value of the two external load capacitors. These two external load
capacitors determine the accuracy of the 25.000 MHz frequency.
o
C
Table 15.15 LAN9312Crystal Specifications
SYMBOL
F
F
F
F
P
C
temp
C
R
fund
age
tol
W
O
L
1
High Performance Two Port 10/100 Managed Ethernet Switch with 32-Bit Non-PCI CPU Interface
Table 15.15
DATASHEET
MIN
300
0
Parallel Resonant Mode
-
-
-
-
-
-
-
-
-
-
452
Fundamental Mode
for crystal specifications.
AT, typ
+/-3 to 5
25.000
20 typ
NOM
7 typ
3 typ
3 typ
-
-
-
-
-
-
+/-50
+/-50
+/-50
MAX
+70
50
-
-
-
-
-
-
-
UNITS
PPM
PPM
PPM
PPM
Ohm
MHz
uW
pF
pF
o
pF
pF
C
SMSC LAN9312
Note 15.11
Note 15.11
Note 15.12
Note 15.13
Note 15.14
Note 15.14
NOTES
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