LAN9312-NU Standard Microsystems (SMSC), LAN9312-NU Datasheet - Page 252
![no-image](/images/manufacturer_photos/0/6/632/standard_microsystems__smsc__sml.jpg)
LAN9312-NU
Manufacturer Part Number
LAN9312-NU
Description
Manufacturer
Standard Microsystems (SMSC)
Datasheet
1.LAN9312-NU.pdf
(458 pages)
Specifications of LAN9312-NU
Number Of Primary Switch Ports
2
Operating Supply Voltage (typ)
3.3V
Fiber Support
No
Phy/transceiver Interface
MII
Power Supply Type
Analog
Data Rate (typ)
10/100Mbps
Vlan Support
Yes
Operating Temperature (max)
70C
Operating Temperature (min)
0C
Pin Count
128
Mounting
Surface Mount
Jtag Support
No
Operating Supply Voltage (max)
3.6V
Operating Supply Voltage (min)
3V
Operating Temperature Classification
Commercial
Data Rate
100Mbps
Lead Free Status / RoHS Status
Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
LAN9312-NU
Manufacturer:
Microchip Technology
Quantity:
10 000
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Revision 1.7 (06-29-10)
14.2.8.5
31:16
BITS
15
14
13
12
11
10
9
8
7
6
RESERVED
(See
Next Page
This bit determines the advertised next page capability and is always 0.
0: Virtual PHY does not advertise next page capability
1: Virtual PHY advertises next page capability
RESERVED
Remote Fault
This bit is not used since there is no physical link partner.
RESERVED
Asymmetric Pause
This bit determines the advertised asymmetric pause capability.
0: No Asymmetric PAUSE toward link partner advertised
1: Asymmetric PAUSE toward link partner advertised
Pause
This bit determines the advertised symmetric pause capability.
0: No Symmetric PAUSE toward link partner advertised
1: Symmetric PAUSE toward link partner advertised
100BASE-T4
This bit determines the advertised 100BASE-T4 capability and is always 0.
0: 100BASE-T4 ability not advertised
1: 100BASE-T4 ability advertised
100BASE-X Full Duplex
This bit determines the advertised 100BASE-X full duplex capability.
0: 100BASE-X full duplex ability not advertised
1: 100BASE-X full duplex ability advertised
100BASE-X Half Duplex
This bit determines the advertised 100BASE-X half duplex capability.
0: 100BASE-X half duplex ability not advertised
1: 100BASE-X half duplex ability advertised
10BASE-T Full Duplex
This bit determines the advertised 10BASE-T full duplex capability.
0: 10BASE-T full duplex ability not advertised
1: 10BASE-T full duplex ability advertised
Virtual PHY Auto-Negotiation Advertisement Register (VPHY_AN_ADV)
This read/write register contains the advertised ability of the Virtual PHY and is used in the Auto-
Negotiation process with the link partner.
Note: This register is re-written in its entirety by the EEPROM Loader following the release or reset
Note
or a RELOAD command. Refer to
information.
14.27)
Offset:
Index (decimal):
1D0h
4
DESCRIPTION
High Performance Two Port 10/100 Managed Ethernet Switch with 32-Bit Non-PCI CPU Interface
DATASHEET
252
Section 10.2.4, "EEPROM Loader," on page 149
Size:
32 bits
TYPE
R/W
R/W
R/W
R/W
R/W
RO
RO
RO
RO
RO
RO
SMSC LAN9312
Note 14.28
Note 14.29
Note 14.30
Note 14.31
DEFAULT
Datasheet
0b
0b
0b
0b
1b
1b
1b
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