LAN9312-NU Standard Microsystems (SMSC), LAN9312-NU Datasheet - Page 135
![no-image](/images/manufacturer_photos/0/6/632/standard_microsystems__smsc__sml.jpg)
LAN9312-NU
Manufacturer Part Number
LAN9312-NU
Description
Manufacturer
Standard Microsystems (SMSC)
Datasheet
1.LAN9312-NU.pdf
(458 pages)
Specifications of LAN9312-NU
Number Of Primary Switch Ports
2
Operating Supply Voltage (typ)
3.3V
Fiber Support
No
Phy/transceiver Interface
MII
Power Supply Type
Analog
Data Rate (typ)
10/100Mbps
Vlan Support
Yes
Operating Temperature (max)
70C
Operating Temperature (min)
0C
Pin Count
128
Mounting
Surface Mount
Jtag Support
No
Operating Supply Voltage (max)
3.6V
Operating Supply Voltage (min)
3V
Operating Temperature Classification
Commercial
Data Rate
100Mbps
Lead Free Status / RoHS Status
Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
LAN9312-NU
Manufacturer:
Microchip Technology
Quantity:
10 000
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High Performance Two Port 10/100 Managed Ethernet Switch with 32-Bit Non-PCI CPU Interface
Datasheet
SMSC LAN9312
9.9.3
29:16
BITS
9:8
31
30
15
14
13
12
10
11
Reserved. This bit is reserved. Reads 0.
Filtering Fail. When set, this bit indicates that the associated frame failed the address recognizing
filtering.
Packet Length. The size, in bytes, of the corresponding received frame.
Error Status (ES). When set this bit indicates that the Host MAC Interface Layer (MIL) has reported
an error. This bit is the Internal logical “or” of bits 11,7,6 and 1.
Reserved. These bits are reserved. Reads 0.
Broadcast Frame. When set, this bit indicates that the received frame has a Broadcast address.
Length Error (LE). When set, this bit indicates that the actual length does not match with the
length/type field of the received frame.
Runt Frame. When set, this bit indicates that frame was prematurely terminated before the collision
window (64 bytes). Runt frames are passed on to the host only if the Pass Bad Frames bit (PASSBAD)
of the
Multicast Frame. When set, this bit indicates that the received frame has a Multicast address.
Reserved. These bits are reserved. Reads 0.
read them as shown in
status word from the RX Status FIFO, to ascertain the data size and any error conditions.
RX Status Format
Note: Though the Host MAC is communicating locally with the switch fabric MAC, the events
Host MAC Control Register (HMAC_CR)
described in the RX Status word may still occur.
Host Read
Order
Figure
Last
2nd
1st
Figure 9.9 RX Packet Format
9.9. It is assumed that the host has previously read the associated
DATASHEET
31
ofs + First Data DWORD
Optional offset DWORDn
Optional offset DWORD0
Optional Pad DWORDn
Optional Pad DWORD0
Last Data DWORD
135
DESCRIPTION
is set.
.
.
.
.
.
.
.
.
0
Revision 1.7 (06-29-10)
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