LAN9312-NU Standard Microsystems (SMSC), LAN9312-NU Datasheet - Page 28
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LAN9312-NU
Manufacturer Part Number
LAN9312-NU
Description
Manufacturer
Standard Microsystems (SMSC)
Datasheet
1.LAN9312-NU.pdf
(458 pages)
Specifications of LAN9312-NU
Number Of Primary Switch Ports
2
Operating Supply Voltage (typ)
3.3V
Fiber Support
No
Phy/transceiver Interface
MII
Power Supply Type
Analog
Data Rate (typ)
10/100Mbps
Vlan Support
Yes
Operating Temperature (max)
70C
Operating Temperature (min)
0C
Pin Count
128
Mounting
Surface Mount
Jtag Support
No
Operating Supply Voltage (max)
3.6V
Operating Supply Voltage (min)
3V
Operating Temperature Classification
Commercial
Data Rate
100Mbps
Lead Free Status / RoHS Status
Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
LAN9312-NU
Manufacturer:
Microchip Technology
Quantity:
10 000
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Revision 1.7 (06-29-10)
3.2
89-92
PIN
110
115
116
111
This section contains the descriptions of the LAN9312 pins. The pin descriptions have been broken
into functional groups as follows:
Note: A list of buffer type definitions is provided in
Pin Descriptions
Ethernet RX
Ethernet RX
Purpose I/O
Ethernet TX
Ethernet TX
Port 1 LED
LAN Port 1 Pins
LAN Port 2 Pins
LAN Port 1 & 2 Power and Common Pins
Host Bus Interface Pins
EEPROM Pins
Dedicated Configuration Strap Pins
Miscellaneous Pins
PLL Pins
Core and I/O Power and Ground Pins
No-Connect Pins
Indicators
Negative
Negative
General
Positive
Positive
NAME
Port 1
Port 1
Port 1
Port 1
Data
nP1LED[3:0]
GPIO[3:0]
SYMBOL
TXN1
RXN1
RXP1
TXP1
High Performance Two Port 10/100 Managed Ethernet Switch with 32-Bit Non-PCI CPU Interface
Table 3.1 LAN Port 1 Pins
DATASHEET
BUFFER
IS/O12/
TYPE
OD12
OD12
(PU)
AIO
AIO
AIO
AIO
28
LED Indicators: When configured as LED outputs
via the
these pins are open-drain, active low outputs and
the pull-ups and input buffers are disabled. The
functionality of each pin is determined via the
LED_CFG[9:8] bits.
General Purpose I/O Data: When configured as
GPIO via the
(LED_CFG), these general purpose signals are
fully programmable as either push-pull outputs,
open-drain outputs or Schmitt-triggered inputs by
writing the
Register (GPIO_CFG)
Data & Direction Register
pull-ups are enabled in GPIO mode. The input
buffers are disabled when set as an output.
Note:
Ethernet TX Negative: Negative output of Port 1
Ethernet transmitter. See
information.
Ethernet TX Positive: Positive output of Port 1
Ethernet transmitter. See
information.
Ethernet RX Negative: Negative input of Port 1
Ethernet receiver. See
information.
Ethernet RX Positive: Positive input of Port 1
Ethernet receiver. See
information.
Section 1.2, "Buffer Types," on page
LED Configuration Register
See
on page 162
General Purpose I/O Configuration
LED Configuration Register
Chapter 13, "GPIO/LED Controller,"
DESCRIPTION
for additional details.
and
Note 3.1
Note 3.1
Note 3.1
Note 3.1
(GPIO_DATA_DIR). The
General Purpose I/O
for additional
for additional
for additional
for additional
(LED_CFG),
SMSC LAN9312
18.
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