MPC8315E-RDBA Freescale, MPC8315E-RDBA Datasheet - Page 95

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MPC8315E-RDBA

Manufacturer Part Number
MPC8315E-RDBA
Description
Manufacturer
Freescale
Datasheet

Specifications of MPC8315E-RDBA

Lead Free Status / RoHS Status
Compliant
XPADVSS
Notes:
1. This pin is an open drain signal. A weak pull-up resistor (1 kΩ) should be placed on this pin to NVDD.
2. This pin is an open drain signal. A weak pull-up resistor (2–10 kΩ) should be placed on this pin to NVDD.
3. This output is actively driven during reset rather than being three-stated during reset.
4. These JTAG pins have weak internal pull-up P-FETs that are always enabled.
5. This pin should have a weak pull up if the chip is in PCI host mode. Follow PCI specifications recommendation.
6. This pin must always be tied to VSS.
7. Thermal sensitive resistor.
8. This pin should be
9. The LB_POR_CFG_BOOT_ECC functionality for this pin is only available in MPC8315E revision 1.1. The
10.This pin should be connected to an external 2.7 K ±1% resistor connected to VSS. The resistor should be placed as close as
Freescale Semiconductor
LB_POR_CFG_BOOT_ECC is sampled only during the PORESET negation. This pin with an internal pull down resistor
enables the ECC by default. To disable the ECC an external strong pull up resistor or a tri-state buffer is needed.
possible to the input.
connecte
MPC8315E PowerQUICC
Signal
Table 70. MPC8315E TEPBGA II Pinout Listing (continued)
d to USB_VSSA_BIAS through 10K precision resistor.
II Pro Processor Hardware Specifications, Rev. 0
Package Pin Number
P5, P9, V3
Pin Type
I
Supply
Power
Package and Pin Listings
Notes
95