MPC8315E-RDBA Freescale, MPC8315E-RDBA Datasheet - Page 109

• Manufacturer Part Number: MPC8315E-RDBA
• Manufacturer: Freescale

Specifications of MPC8315E-RDBA

• Lead Free Status / RoHS Status: Compliant

26.6
The MPC8315E provides the user with power-on configuration options that can be set through the use of
external pull-up or pull-down resistors of 4.7 kΩ on certain output pins (see customer visible configuration
pins). These pins are generally used as output only pins in normal operation.
While HRESET is asserted however, these pins are treated as inputs. The value presented on these pins
while HRESET is asserted, is latched when PORESET deasserts, at which time the input receiver is
disabled and the I/O circuit takes on its normal function. Careful board layout with stubless connections
to these pull-up/pull-down resistors coupled with the large value of the pull-up/pull-down resistor should
minimize the disruption of signal quality or speed for output pins thus configured.
26.7
The MPC8315E requires high resistance pull-up resistors (10 kΩ is recommended) on open drain type pins
including I
For more information on required pull up resistors and the connections required for JTAG interface, see
AN3438, MPC8315 Design Checklist
27
Ordering information for the parts fully covered by this specification document is provided in
Section 27.1, “Part Numbers Fully Addressed by this Document.”
27.1
Table 81
part numbers correspond to a maximum processor core frequency. For available frequencies, contact your
local Freescale sales office. In addition to the processor frequency, the part numbering scheme also
includes an application modifier which may specify special application conditions. Each part number also
contains a revision code which refers to the die mask revision number.
Freescale Semiconductor
Note: Nominal supply voltages. See
Impedance
Differential
R
R
N
P
Ordering Information
provides the Freescale part numbering nomenclature for the MPC8315E. Note that the individual
Pull-Up Resistor Requirements
Part Numbers Fully Addressed by this Document
Configuration Pin Multiplexing
2
C pins, Ethernet Management MDIO pin and EPIC interrupt pins.
Configuration, Power
Local Bus, Ethernet,
DUART, Control,
MPC8315E PowerQUICC
Management
42 Target
42 Target
NA
Table
Table 80. Impedance Characteristics
1, T
(Not Including PCI
j
= 105°C.
Output Clocks)
™
PCI Signals
II Pro Processor Hardware Specifications, Rev. 0
25 Target
25 Target
NA
PCI Output Clocks
PCI_SYNC_OUT)
(Including
42 Target
42 Target
NA
DDR DRAM
20 Target
20 Target
NA
Ordering Information
Symbol
Z
DIFF
Z
Z
0
0
Unit
Ω
Ω
Ω
109