MPC8315E-RDBA Freescale, MPC8315E-RDBA Datasheet - Page 77

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MPC8315E-RDBA

Manufacturer Part Number
MPC8315E-RDBA
Description
Manufacturer
Freescale
Datasheet

Specifications of MPC8315E-RDBA

Lead Free Status / RoHS Status
Compliant
Figure 56
Figure 57
generally reference the rising edge of the clock, these AC timing diagrams also apply when the falling edge
is the active edge.
Figure 57
Freescale Semiconductor
SPI inputs—slave mode (external clock) input setup time
SPI inputs—slave mode (external clock) input hold time
Notes:
1. Output specifications are measured from the 50% level of the rising edge of SPICLK to the 50% level of the signal. Timings
2. The symbols used for timing specifications follow the pattern of t
are measured at the pin.
inputs and t
timing (NI) for the time SPICLK clock reference (K) goes to the high state (H) until outputs (O) are invalid (X).
Note: The clock edge is selectable on SPI.
provides the AC test load for the SPI.
and
shows the SPI timing in slave mode (external clock).
Output Signals:
SPICLK (Input)
Input Signals:
(first two letters of functional block)(reference)(state)(signal)(state)
Figure 58
(See Note)
(See Note)
SPIMOSI
SPIMISO
MPC8315E PowerQUICC
Figure 57. SPI AC Timing in Slave Mode (External Clock) Diagram
Output
represents the AC timing from
Characteristic
t
NEIVKH
Table 67. SPI AC Timing Specifications
Figure 56. SPI AC Test Load
Z
0
II Pro Processor Hardware Specifications, Rev. 0
= 50 Ω
t
NEKHOV
t
NEIXKH
(first two letters of functional block)(signal)(state)(reference)(state)
Table
for outputs. For example, t
67. Note that although the specifications
R
L
Symbol
t
t
= 50 Ω
NEIVKH
NEIXKH
1
2
NVDD/2
NIKHOX
Min
4
2
symbolizes the internal
Max
Unit
ns
ns
for
SPI
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